Date: 26 Sep 2005

Memory address prediction for data speculation

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Abstract

Data speculation refers to the execution of an instruction before some logically preceding instructions on which it is data dependent. Data speculation implies some form of prediction of the data required by the speculative executed instruction and a recovering mechanism in case of misspeculation. This paper shows that load/store instructions are very good candidates for speculative execution since their effective address is highly predictable. We propose a novel technique called Memory Address Prediction (MAP) that implements speculative execution of load/store instructions in an out-of-order processor. The cost of this mechanism is mainly the addition of an address prediction table since the misprediction recovery hardware is already present in many current microprocessors for other purposes. The mechanism is evaluated for the SPEC95 benchmark suite showing significant performance gains.

This work has been supported by the Spanish Ministry of Education under grant CYCIT TIC 429/95 and the Direcció General de Recerca of the Generalitat de Catalunya under grant 1996FI-03039-APDT.