Abstract
This paper presents a resourceful utilization of a monotonic digitally controlled delay element (DCDE) to propose a programmable high frequency trigger pulse generator circuit (TPG). Performance evaluation of various analog and digital programmable delay elements (DEs) have been carried out to reach the conclusions presented. Further, this work exploits a monotonic DCDE along with an efficient XOR circuitry, to realize the proposed TPG. The proposed design generates a very high frequency ultra-thin pulses of pulse duration ranging from 56 to 170 ps for digital input vector ranging from ‘00000’ to ‘11111’, respectively. The proposed design has been extensively verified using SPICE @ 16-nm predictive technology model.
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Salameh, D., Linton, D.: Novel Wide Bandwidth GAAS Sampling MMIC using Microstrip Based Nonlinear Transmission Line (NLTL) and NLTL Shock Wave Generator Design, IEEE 28th European Microwave Conference, pp. 18–23 (1998)
Dwivedi, A.K, Urma, K.A., Islam, A.: Trigger pulse generator using proposed buffered delay model and its application. Act. Passive Electron. Compon. Article ID 920508, 9 p, 2015. doi:10.1155/2015/920508
Dwivedi, A.K., Urma, K.A., Kumar, A., Islam, A.: Robust Design of CNFET Based Buffered Delay Model and Microwave Pulse Generator, In: IEEE International Conference on Devices, Circuits and Communications (ICDCCom—2014), BIT, Mesra, Ranchi, India, September 12–13, 2014
Mahapatra, N.R., Tareen, A., Garimella, S.V.: Comparison and analysis of delay elements, In: The 2002 45th Midwest Symposium on Circuits and Systems, IEEE press, vol. 02, pp. II-473- II-476, Aug (2002)
Rabaey, J.M.: Digital integrated circuits: A design perspective, Prentice-Hall Book Company, 1st edn, ISBN #0-13-178609-1. Upper Saddle River, NJ (1996)
Mahapatra, N.R., Garimella, S.V., Tareen, A.: Efficient techniques based on gate triggering for designing static CMOS ICs with very low glitch power dissipation, In: Proceedings of the 2000 IEEE International Symposium on Circuits and Systems, vol. 2, pp. 537–540, Geneva, Switzerland, May 28–31 (2000)
Maymandi-Nejad, M., Sachdev, M.: A monotonic digitally controlled delay element. IEEE J. Solid-State Circ. 40(11), 2212–2219 (2005)
Srivastava, P., Dwivedi, A.K., Islam, A.: Power—and Variability-Aware Design of FinFET-Based XOR Circuit at Nanoscale Regime, In: IEEE International Conference on Advanced Communications, Control and Computing Technologies (ICACCCT), Ramanathapuram, Tamilnadu, India, May 08–10, 2014, pp. 440–444
[Online]. Available: http://ptm.asu.edu/
Pai, C.S., Diodato, P.W., Liu, R.: A case study of RC effects to circuit performance. In: Proceedings of the IEEE 1998 International Interconnect Technology Conference, IEEE press, 1998, pp. 244–246, doi:10.1109/IITC.1998.704911
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Dwivedi, A.K., Guduri, M., Mehra, R., Islam, A. (2016). A Monotonic Digitally Controlled Delay Element-Based Programmable Trigger Pulse Generator. In: Satapathy, S., Raju, K., Mandal, J., Bhateja, V. (eds) Proceedings of the Second International Conference on Computer and Communication Technologies. Advances in Intelligent Systems and Computing, vol 379. Springer, New Delhi. https://doi.org/10.1007/978-81-322-2517-1_36
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DOI: https://doi.org/10.1007/978-81-322-2517-1_36
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