International Workshop on Cryptographic Hardware and Embedded Systems

CHES 2015: Cryptographic Hardware and Embedded Systems -- CHES 2015 pp 185-204

Accelerating LTV Based Homomorphic Encryption in Reconfigurable Hardware

  • Yarkın Doröz
  • Erdinç Öztürk
  • Erkay Savaş
  • Berk Sunar
Conference paper

DOI: 10.1007/978-3-662-48324-4_10

Part of the Lecture Notes in Computer Science book series (LNCS, volume 9293)
Cite this paper as:
Doröz Y., Öztürk E., Savaş E., Sunar B. (2015) Accelerating LTV Based Homomorphic Encryption in Reconfigurable Hardware. In: Güneysu T., Handschuh H. (eds) Cryptographic Hardware and Embedded Systems -- CHES 2015. CHES 2015. Lecture Notes in Computer Science, vol 9293. Springer, Berlin, Heidelberg

Abstract

After being introduced in 2009, the first fully homomorphic encryption (FHE) scheme has created significant excitement in academia and industry. Despite rapid advances in the last 6 years, FHE schemes are still not ready for deployment due to an efficiency bottleneck. Here we introduce a custom hardware accelerator optimized for a class of reconfigurable logic to bring LTV based somewhat homomorphic encryption (SWHE) schemes one step closer to deployment in real-life applications. The accelerator we present is connected via a fast PCIe interface to a CPU platform to provide homomorphic evaluation services to any application that needs to support blinded computations. Specifically we introduce a number theoretical transform based multiplier architecture capable of efficiently handling very large polynomials. When synthesized for the Xilinx Virtex 7 family the presented architecture can compute the product of large polynomials in under 6.25 msec making it the fastest multiplier design of its kind currently available in the literature and is more than 102 times faster than a software implementation. Using this multiplier we can compute a relinearization operation in 526 msec. When used as an accelerator, for instance, to evaluate the AES block cipher, we estimate a per block homomorphic evaluation performance of 442 msec yielding performance gains of 28.5 and 17 times over similar CPU and GPU implementations, respectively.

Keywords

Somewhat homomorphic encryption NTT multiplication FPGA 

Copyright information

© International Association for Cryptologic Research 2015

Authors and Affiliations

  • Yarkın Doröz
    • 1
  • Erdinç Öztürk
    • 2
  • Erkay Savaş
    • 3
  • Berk Sunar
    • 1
  1. 1.Worcester Polytechnic InstituteWorcesterUSA
  2. 2.Istanbul Commerce UniversityIstanbulTurkey
  3. 3.Sabanci UniversityIstanbulTurkey

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