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Cryptographic Hardware and Embedded Systems - CHES 2013

Volume 8086 of the series Lecture Notes in Computer Science pp 126-141

Pushing the Limits of SHA-3 Hardware Implementations to Fit on RFID

  • Peter PesslAffiliated withInstitute for Applied Information Processing and Communications (IAIK), Graz University of Technology
  • , Michael HutterAffiliated withInstitute for Applied Information Processing and Communications (IAIK), Graz University of Technology

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Abstract

There exists a broad range of RFID protocols in literature that propose hash functions as cryptographic primitives. Since keccak has been selected as the winner of the NIST SHA-3 competition in 2012, there is the question of how far we can push the limits of keccak to fulfill the stringent requirements of passive low-cost RFID. In this paper, we address this question by presenting a hardware implementation of keccak that aims for lowest power and lowest area. Our smallest (full-state) design requires only 2 927 GEs (for designs with external memory available) and 5 522 GEs (total size including memory). It has a power consumption of 12.5 μW at 1 MHz on a low leakage 130 nm CMOS process technology. As a result, we provide a design that needs 40% less resources than related work. Our design is even smaller than the smallest SHA-1 and SHA-2 implementations.

Keywords

Hardware Implementation SHA-3 Keccak ASIC RFID Low-Power Design Embedded Systems