Design Principles for Synthesizable Processor Cores

  • Pascal Schleuniger
  • Sally A. McKee
  • Sven Karlsson
Conference paper

DOI: 10.1007/978-3-642-28293-5_10

Part of the Lecture Notes in Computer Science book series (LNCS, volume 7179)
Cite this paper as:
Schleuniger P., McKee S.A., Karlsson S. (2012) Design Principles for Synthesizable Processor Cores. In: Herkersdorf A., Römer K., Brinkschulte U. (eds) Architecture of Computing Systems – ARCS 2012. ARCS 2012. Lecture Notes in Computer Science, vol 7179. Springer, Berlin, Heidelberg

Abstract

As FPGAs get more competitive, synthesizable processor cores become an attractive choice for embedded computing. Currently popular commercial processor cores do not fully exploit current FPGA architectures. In this paper, we propose general design principles to increase instruction throughput on FPGA-based processor cores: first, superpipelining enables higher-frequency system clocks, and second, predicated instructions circumvent costly pipeline stalls due to branches. To evaluate their effects, we develop Tinuso, a processor architecture optimized for FPGA implementation. We demonstrate through the use of micro-benchmarks that our principles guide the design of a processor core that improves performance by an average of 38% over a similar Xilinx MicroBlaze configuration.

Keywords

synthesizable processor core FPGA predication pipelining 

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

Copyright information

© Springer-Verlag Berlin Heidelberg 2012

Authors and Affiliations

  • Pascal Schleuniger
    • 1
  • Sally A. McKee
    • 2
  • Sven Karlsson
    • 1
  1. 1.DTU InformaticsTechnical University of DenmarkDenmark
  2. 2.Computer Science EngineeringChalmers University of TechnologySweden

Personalised recommendations