Advances in Cryptology – ASIACRYPT 2009

Volume 5912 of the series Lecture Notes in Computer Science pp 685-702

Memory Leakage-Resilient Encryption Based on Physically Unclonable Functions

  • Frederik ArmknechtAffiliated withLancaster UniversityHorst Görtz Institute for IT Security, Ruhr-University Bochum
  • , Roel MaesAffiliated withLancaster UniversityESAT/COSIC and IBBT, Catholic University of Leuven
  • , Ahmad-Reza SadeghiAffiliated withLancaster UniversityHorst Görtz Institute for IT Security, Ruhr-University Bochum
  • , Berk SunarAffiliated withLancaster UniversityCryptography & Information Security, WPI
  • , Pim TuylsAffiliated withLancaster UniversityCarnegie Mellon UniversityESAT/COSIC and IBBT, Catholic University of LeuvenIntrinsic ID


Physical attacks on cryptographic implementations and devices have become crucial. In this context a recent line of research on a new class of side-channel attacks, called memory attacks, has received increasingly more attention. These attacks allow an adversary to measure a significant fraction of secret key bits directly from memory, independent of any computational side-channels.

Physically Unclonable Functions (PUFs) represent a promising new technology that allows to store secrets in a tamper-evident and unclonable manner. PUFs enjoy their security from physical structures at submicron level and are very useful primitives to protect against memory attacks.

In this paper we aim at making the first step towards combining and binding algorithmic properties of cryptographic schemes with physical structure of the underlying hardware by means of PUFs. We introduce a new cryptographic primitive based on PUFs, which we call PUF-PRFs. These primitives can be used as a source of randomness like pseudorandom functions (PRFs). We construct a block cipher based on PUF-PRFs that allows simultaneous protection against algorithmic and physical attackers, in particular against memory attacks. While PUF-PRFs in general differ in some aspects from traditional PRFs, we show a concrete instantiation based on established SRAM technology that closes these gaps.