Studying Compiler Optimizations on Superscalar Processors Through Interval Analysis

  • Stijn Eyerman
  • Lieven Eeckhout
  • James E. Smith
Conference paper

DOI: 10.1007/978-3-540-77560-7_9

Part of the Lecture Notes in Computer Science book series (LNCS, volume 4917)
Cite this paper as:
Eyerman S., Eeckhout L., Smith J.E. (2008) Studying Compiler Optimizations on Superscalar Processors Through Interval Analysis. In: Stenström P., Dubois M., Katevenis M., Gupta R., Ungerer T. (eds) High Performance Embedded Architectures and Compilers. HiPEAC 2008. Lecture Notes in Computer Science, vol 4917. Springer, Berlin, Heidelberg

Abstract

Understanding the performance impact of compiler optimizations on superscalar processors is complicated because compiler optimizations interact with the microarchitecture in complex ways. This paper analyzes this interaction using interval analysis, an analytical processor model that allows for breaking total execution time into cycle components. By studying the impact of compiler optimizations on the various cycle components, one can gain insight into how compiler optimizations affect out-of-order processor performance. The analysis provided in this paper reveals various interesting insights and suggestions for future work on compiler optimizations for out-of-order processors. In addition, we contrast the effect compiler optimizations have on out-of-order versus in-order processors.

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Copyright information

© Springer-Verlag Berlin Heidelberg 2008

Authors and Affiliations

  • Stijn Eyerman
    • 1
  • Lieven Eeckhout
    • 1
  • James E. Smith
    • 2
  1. 1.ELIS DepartmentGhent UniversityBelgium
  2. 2.ECE DepartmentUniversity of Wisconsin – Madison 

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