A Compiler Framework for Supporting Speculative Multicore Processors

  • Pen-Chung Yew
Conference paper

DOI: 10.1007/978-3-540-74309-5_1

Part of the Lecture Notes in Computer Science book series (LNCS, volume 4697)
Cite this paper as:
Yew PC. (2007) A Compiler Framework for Supporting Speculative Multicore Processors. In: Choi L., Paek Y., Cho S. (eds) Advances in Computer Systems Architecture. ACSAC 2007. Lecture Notes in Computer Science, vol 4697. Springer, Berlin, Heidelberg


As multi-core technology is currently being deployed in computer industry primarily to limit power consumption and improve throughput, continued performance improvement of a single application on such systems remains an important and challenging task. Because of the shortened on-chip communication latency between cores, using thread-level parallelism (TLP) to improve the number of instructions executed per clock cycle, i.e., to improve ILP performance, has shown to be effective for many general-purpose applications. However, because of the program characteristics of these applications, effective speculative schemes at both thread- and instruction-level are crucial.

Copyright information

© Springer-Verlag Berlin Heidelberg 2007

Authors and Affiliations

  • Pen-Chung Yew
    • 1
  1. 1.University of Minnesota at Twin Cities 

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