Power Modelling in Field Programmable Gate Arrays (FPGA)

  • Andrés Garcia
  • Wayne Burleson
  • Jean-Luc Danger
Conference paper

DOI: 10.1007/978-3-540-48302-1_44

Volume 1673 of the book series Lecture Notes in Computer Science (LNCS)
Cite this paper as:
Garcia A., Burleson W., Danger JL. (1999) Power Modelling in Field Programmable Gate Arrays (FPGA). In: Lysaght P., Irvine J., Hartenstein R. (eds) Field Programmable Logic and Applications. FPL 1999. Lecture Notes in Computer Science, vol 1673. Springer, Berlin, Heidelberg

Abstract

This paper presents a power consumption model for FPGAs based on measurements. This model will permit us to optimize power consumption on FPGAs using existing architectures, as well as helping direct the design of new power-sensitive FPGA architectures.

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

Copyright information

© Springer-Verlag Berlin Heidelberg 1999

Authors and Affiliations

  • Andrés Garcia
    • 1
  • Wayne Burleson
    • 2
  • Jean-Luc Danger
    • 1
  1. 1.Ecole Nationale Supérieure des TélécommunicationsParisFrance
  2. 2.University of MassachusettsAmherstUSA