Instantiating Uninterpreted Functional Units and Memory System: Functional Verification of the VAMP

  • Sven Beyer
  • Chris Jacobi
  • Daniel Kröning
  • Dirk Leinenbach
  • Wolfgang J. Paul
Conference paper

DOI: 10.1007/978-3-540-39724-3_7

Volume 2860 of the book series Lecture Notes in Computer Science (LNCS)
Cite this paper as:
Beyer S., Jacobi C., Kröning D., Leinenbach D., Paul W.J. (2003) Instantiating Uninterpreted Functional Units and Memory System: Functional Verification of the VAMP. In: Geist D., Tronci E. (eds) Correct Hardware Design and Verification Methods. CHARME 2003. Lecture Notes in Computer Science, vol 2860. Springer, Berlin, Heidelberg

Abstract

In the VAMP (verified architecture microprocessor) project we have designed, functionally verified, and synthesized a processor with full DLX instruction set, delayed branch, Tomasulo scheduler, maskable nested precise interrupts, pipelined fully IEEE compatible dual precision floating point unit with variable latency, and separate instruction and data caches. The verification has been carried out in the theorem proving system PVS. The processor has been implemented on a Xilinx FPGA.

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Copyright information

© Springer-Verlag Berlin Heidelberg 2003

Authors and Affiliations

  • Sven Beyer
    • 1
  • Chris Jacobi
    • 2
  • Daniel Kröning
    • 3
  • Dirk Leinenbach
    • 1
  • Wolfgang J. Paul
    • 1
  1. 1.Computer Science DepartmentSaarland UniversitySaarbrückenGermany
  2. 2.IBM Deutschland Entwicklung GmbH, Processor Dev. IIBöblingenGermany
  3. 3.Computer ScienceCarnegie Mellon UniversityPittburgh