Performance Improvement of Hardware-Based Packet Classification Algorithm

  • Yaw-Chung Chen
  • Pi-Chung Wang
  • Chun-Liang Lee
  • Chia-Tai Chan
Conference paper

DOI: 10.1007/978-3-540-31957-3_82

Volume 3421 of the book series Lecture Notes in Computer Science (LNCS)
Cite this paper as:
Chen YC., Wang PC., Lee CL., Chan CT. (2005) Performance Improvement of Hardware-Based Packet Classification Algorithm. In: Lorenz P., Dini P. (eds) Networking - ICN 2005. ICN 2005. Lecture Notes in Computer Science, vol 3421. Springer, Berlin, Heidelberg

Abstract

Packet classification is important in fulfilling the requirements of differentiated services in next generation networks. In the previous work, we presented an efficient hardware scheme, Condensate Bit Vector, based on bit vectors. The scheme significantly improves the scalability of packet classification. In this work, the characteristics of Condensate Bit Vector are further illustrated, and two drawbacks that may negatively affect the performance of Condensate Bit Vector are revealed. We show the solution to resolve the weaknesses and introduce the new schemes, Condensate Ordered Bit Vector and Condensate and Aggregate Ordered Bit Vector. Experiments show that our new algorithms drastically improve the search speed as compared to the original algorithm.

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Copyright information

© Springer-Verlag Berlin Heidelberg 2005

Authors and Affiliations

  • Yaw-Chung Chen
    • 1
  • Pi-Chung Wang
    • 2
  • Chun-Liang Lee
    • 2
  • Chia-Tai Chan
    • 2
  1. 1.Department of Computer Science and Information EngineeringNational Chiao Tung UniversityHsinChuTaiwan, R.O.C.
  2. 2.Telecommunication LaboratoriesChunghwa Telecom Co., Ltd.TaipeiTaiwan, R.O.C.