Implementing parallelism in random discrete event-driven simulation
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The inherently sequential nature of random discrete event-driven simulation has made parallel and distributed processing difficult. This paper presents a method of applying Reconfigurable Logic to gain some parallelism in event generation. Field Programmable Gate Arrays (FPGAs) are used to create a flexible and fast environment in which events may be generated according to various statistical models. The method presented accelerates both event generation and the elimination of some blocked events from the Event Queue.
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About this Chapter
- Implementing parallelism in random discrete event-driven simulation
- Book Title
- Parallel and Distributed Processing
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- 10 IPPS/SPDP'98 Workshops Held in Conjunction with the 12th International Parallel Processing Symposium and 9th Symposium on Parallel and Distributed Processing Orlando, Florida, USA, March 30 – April 3, 1998 Proceedings
- pp 418-427
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- Lecture Notes in Computer Science
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