Compile time instruction cache optimizations
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This paper presents a new approach for improving performance of instruction cache based systems. The idea is to prevent cache misses caused when different segments of code, which are executed in the same loop, are mapped onto the same cache area. The new approach uses static information only and does not rely on any special hardware mechanisms such as support of non-cachable addresses. The technique can be applied at compile time or as part of object modules optimization. The technique is based on replication of code together with algorithms for code placement. We introduce the notion of abstract caches and present simulation results of the new technique. The results show that in certain cases, the number of cache misses is reduced by two orders of magnitude.
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- Compile time instruction cache optimizations
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- Compiler Construction
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- 5th International Conference, CC '94 Edinburgh, U.K., April 7–9, 1994 Proceedings
- pp 404-418
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- Lecture Notes in Computer Science
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- Springer Berlin Heidelberg
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