Reconfigurable Computing for Speech Recognition: Preliminary Findings
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Continuous real-time speech recognition is a highly computationally-demanding task, but one which can take good advantage of a parallel processing system. To this end, we describe proposals for, and preliminary findings of, research in implementing in programmable logic the decoder part of a speech recognition system. Recognition via Viterbi decoding of Hidden Markov Models is outlined, along with details of current implementations, which aim to exploit properties of the algorithm that could make it well-suited for devices such as FPGAs. The question of how to deal with limited resources, by reconfiguration or otherwise, is also addressed.
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- Reconfigurable Computing for Speech Recognition: Preliminary Findings
- Book Title
- Field-Programmable Logic and Applications: The Roadmap to Reconfigurable Computing
- Book Subtitle
- 10th International Conference, FPL 2000 Villach, Austria, August 27–30, 2000 Proceedings
- pp 495-504
- Print ISBN
- Online ISBN
- Series Title
- Lecture Notes in Computer Science
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- Springer Berlin Heidelberg
- Copyright Holder
- Springer-Verlag Berlin Heidelberg
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- Editor Affiliations
- 4. Computer Science Department, University of Kaiserslautern
- 5. Carinthia Tech Institute
- Author Affiliations
- 6. School of Electronic and Electrical Engineering, University of Birmingham, Edgbaston, Birmingham, B15 2TT, UK
- 7. Xilinx, Inc, 2300 55th Street, Boulder, Colorado, 80301, USA
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