Session 2a: Implementations And Architectures

Third International Conference on Logic Programming

Volume 225 of the series Lecture Notes in Computer Science pp 172-179

Date:

A Prolog processor based on a pattern matching memory device

  • Ian RobinsonAffiliated withSchlumberger Palo Alto Research, Computer Aided Systems Laboratory

* Final gross prices may vary according to local VAT.

Get Access

Abstract

A Prolog processing system using a parallel pattern matching component is outlined. The component, called a Pattern Addressable Memory (PAM), is used to store the clause heads from a Prolog database, and match them against an input goal/subgoal. It is shown that using this device has advantages not only for clause selection, but also for the unification function itself. Such a system, it is argued, demonstrates superior performance compared to serial approaches.