International Workshop on Cryptographic Hardware and Embedded Systems

CHES 2005: Cryptographic Hardware and Embedded Systems – CHES 2005 pp 354-365

Prototype IC with WDDL and Differential Routing – DPA Resistance Assessment

  • Kris Tiri
  • David Hwang
  • Alireza Hodjat
  • Bo-Cheng Lai
  • Shenglin Yang
  • Patrick Schaumont
  • Ingrid Verbauwhede
Conference paper

DOI: 10.1007/11545262_26

Volume 3659 of the book series Lecture Notes in Computer Science (LNCS)

Abstract

Wave dynamic differential logic combined with differential routing is a working, practical technique to thwart side-channel power attacks. Measurement-based experimental results show that a differential power analysis attack on a prototype IC, fabricated in 0.18μm CMOS, does not disclose the entire secret key of the AES algorithm at 1,500,000 measurement acquisitions. This makes the attack de facto infeasible. The required number of measurements is larger than the lifetime of the secret key in most practical systems.

Keywords

side-channel attack (SCA)differential power analysis (DPA)countermeasuredual rail with prechargewave dynamic differential logic (WDDL)differential routingparasitic capacitance matching
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Copyright information

© Springer-Verlag Berlin Heidelberg 2005

Authors and Affiliations

  • Kris Tiri
    • 1
  • David Hwang
    • 1
  • Alireza Hodjat
    • 1
  • Bo-Cheng Lai
    • 1
  • Shenglin Yang
    • 1
  • Patrick Schaumont
    • 1
  • Ingrid Verbauwhede
    • 1
    • 2
  1. 1.Electrical Engineering Dept.UC Los AngelesUSA
  2. 2.Dept. ESAT/SCD-COSICK.U.LeuvenBelgium