Integration of Formal Verification and Debugging Methods in P-GRADE Environment

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Abstract

In this paper we present a combined method, which enables the collaboration of parallel debugging techniques with simulation and verification of parallel program’s coloured Petri-net model in the frame of an integrated development environment. For parallel applications, written in the hybrid graphical language of P-GRADE, the coloured Petri-net model can be automatically generated. The Occurrence Graph (a kind of state-space) is constructed straight away from the model by the GRSIM simulation engine, which allows examining and querying the Occurrence Graph for critical information, such as dead-locks, wrong termination, or the meeting the temporal logic specification. Based on the obtained information the macrostep-based execution can be steered towards the erroneous situations assisting to users to improve the quality of their software.

The research described in this paper has been supported by the following projects and grants: Hungarian OTKA T042459, and Hungarian IHM 4671/1/2003 project.