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Advanced Parallel Processing Technologies

5th International Workshop, APPT 2003, Xiamen, China, September 17-19, 2003, Proceedings

  • Conference proceedings
  • © 2003

Overview

Editors:
  1. Xingming Zhou

    1. PDL, National University of Defense Technology, Changsha, China

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  2. Ming Xu

    1. Department of Network Engineering, School of Computer Science, National University of Defense Technology, Changsha, China

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  3. Stefan Jähnichen

    1. Fraunhofer FIRST, Berlin, Germany

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  4. Jiannong Cao

    1. Department of Computing, Hong Kong Polytechnic University, Kowloon, Hong Kong, China

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Part of the book series: Lecture Notes in Computer Science (LNCS, volume 2834)

Included in the following conference series:

Conference proceedings info: APPT 2003.

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Table of contents (77 papers)

  1. Front Matter

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  2. Architecture

    1. Front Matter

      Pages 1-1
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    2. Using Split Queues to Improve the Performance of Parallel Switch

      • Xiaofeng Hu, Zhigang Sun, Xicheng Lu, Jinshu Su
      Pages 3-11

    3. LEAP: A Data Driven Loop Engine on Array Processor

      • Yong Dou, Xicheng Lu
      Pages 12-22

    4. A New Architecture of a Fast Floating-Point Multiplier

      • Xu Zhou, Zhimin Tang
      Pages 23-30

    5. A Highly Efficient FC-SAN Based on Load Stream

      • Jiwu Shu, Jun Yao, Changdong Fu, Weimin Zheng
      Pages 31-40

    6. A New High-Performance Distributed Shared I/O System

      • Qiong Li, Guangming Liu, Yufeng Guo, Hengzhu Liu
      Pages 41-49

    7. IA64 Oriented OpenMP Compiler: Design and Implementation of Fortran Front End

      • Hongshan Jiang, Suqin Zhang, Jinlan Tian
      Pages 50-56

    8. An Alternative Superscalar Architecture with Integer Execution Units Only

      • Kenneth K. C. Lee, K. -E. Grosspietsch, Y. K. Chan
      Pages 57-65

    9. A High Efficiency Distributed Mutual Exclusion Algorithm

      • Dan Liu, Xinsong Liu, Zhijie Qiu, Gongjun Yan
      Pages 75-84

    10. The Security Architecture of the Java Operating System JX – A Security Architecture for Distributed Parallel Computing

      • Christian Wawersich, Meik Felser, Michael Golm, Jürgen Kleinöder
      Pages 85-95

    11. Simultaneous Multithreading Trace Processors

      • K. F. Wang, Zhenzhou Ji, Mingzeng Hu
      Pages 96-103

    12. A VLSI Architecture Design of 1-D DWT

      • Zhiyang Cao, Zhenzhou Ji, Mingzeng Hu
      Pages 104-108

    13. Overcoming Static Register Pressure for Software Pipelining in the Itanium Architecture

      • Haibo Lin, Wenlong Li, Zhizhong Tang
      Pages 109-113

    14. Separating Data Storage, Data Computation, and Resource Management One from Another in Operating Systems

      • Fuyan Liu, Jinyuan You
      Pages 114-124

    15. A High Performance Design and Implementation of the Virtual Interface Architecture

      • Yu Chen, Zhenqiang Jiao, Jun Xie, Zhihui Du, Peng Liu, Ziyu Zhu
      Pages 125-135

    16. A Portable Debugger for PVM / MPI Programs on IA64 Cluster

      • Xi Qian, Jian Liu, Weimin Zheng
      Pages 136-139

    17. Optimization of Asynchronous Volume Replication Protocol

      • Huanqing Dong, Zhanhuai Li
      Pages 140-146

    18. Predicate Analysis Based on Path Information

      • Li Shen, Zhiying Wang, Jianzhuang Lu
      Pages 147-151

    19. kd-Clos: New No-Blocking Permutation Network

      • Mei Ming, Dong Li, Bo Fu
      Pages 152-156
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About this book

This volume contains the papers presented at the 5th International Workshop on Advanced Parallel Processing Technologies, APPT 2003. This series of workshops is designed to strengthen the cooperation between the German and Chinese institutions active in the area of these technologies. It has continued to grow, providing an excellent forum for reporting advances in parallel processing technologies. The 5th workshop itself addressed the entire gamut of related topics, ranging from the architectural aspects of parallel computer hardware and system software to the applied technologies for novel applications. For this workshop, we received over 191 full submissions from researchers all over the world. All the papers were peer-reviewed in depth and qualitatively graded on their relevance, originality, signi?cance, presentation, and the overall appropriateness for their acceptance. Any concerns raised were discussed in the program committee. The organizing committee did an excellent job in selecting 78 papers (Among them, 21 were short ones) for presentation. In short, the papers included here represent the forefront of research from China, Germany, and the other countries.

Editors and Affiliations

  • PDL, National University of Defense Technology, Changsha, China

    Xingming Zhou

  • Department of Network Engineering, School of Computer Science, National University of Defense Technology, Changsha, China

    Ming Xu

  • Fraunhofer FIRST, Berlin, Germany

    Stefan Jähnichen

  • Department of Computing, Hong Kong Polytechnic University, Kowloon, Hong Kong, China

    Jiannong Cao

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