Automated Technology for Verification and Analysis

1. Front Matter

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2. Invited Talks

   1. Verifying VLSI Circuits

      • Mark R. Greenstreet

      Pages 1-20

   2. 3-Valued Abstraction for (Bounded) Model Checking

      • Orna Grumberg

      Pages 21-21

   3. Local Search in Model Checking

      • A. W. Roscoe, P. J. Armstrong, Pragyesh

      Pages 22-38

3. State Space Reduction

   1. Exploring the Scope for Partial Order Reduction

      • Jaco Geldenhuys, Henri Hansen, Antti Valmari

      Pages 39-53

   2. State Space Reduction of Linear Processes Using Control Flow Reconstruction

      • Jaco van de Pol, Mark Timmer

      Pages 54-68

   3. A Data Symmetry Reduction Technique for Temporal-epistemic Logic

      • Mika Cohen, Mads Dam, Alessio Lomuscio, Hongyang Qu

      Pages 69-83

4. Tools

   1. TAPAAL: Editor, Simulator and Verifier of Timed-Arc Petri Nets

      • Joakim Byg, Kenneth Yrke Jørgensen, Jiří Srba

      Pages 84-89

   2. CLAN: A Tool for Contract Analysis and Conflict Discovery

      • Stephen Fenech, Gordon J. Pace, Gerardo Schneider

      Pages 90-96

   3. UnitCheck: Unit Testing and Model Checking Combined

      • Michal Kebrt, Ondřej Šerý

      Pages 97-103

5. Probabilistic Systems

   1. LTL Model Checking of Time-Inhomogeneous Markov Chains

      • Taolue Chen, Tingting Han, Joost-Pieter Katoen, Alexandru Mereacre

      Pages 104-119

   2. Statistical Model Checking Using Perfect Simulation

      • Diana El Rabih, Nihal Pekergin

      Pages 120-134

   3. Quantitative Analysis under Fairness Constraints

      • Christel Baier, Marcus Groesser, Frank Ciesinski

      Pages 135-150

   4. A Decompositional Proof Scheme for Automated Convergence Proofs of Stochastic Hybrid Systems

      • Jens Oehlerking, Oliver Theel

      Pages 151-165

6. Medley

   1. Memory Usage Verification Using Hip/Sleek

      • Guanhua He, Shengchao Qin, Chenguang Luo, Wei-Ngan Chin

      Pages 166-181

   2. Solving Parity Games in Practice

      • Oliver Friedmann, Martin Lange

      Pages 182-196

   3. Automated Analysis of Data-Dependent Programs with Dynamic Memory

      • Parosh Aziz Abdulla, Muhsin Atto, Jonathan Cederberg, Ran Ji

      Pages 197-212

7. Temporal Logic I

   1. On-the-fly Emptiness Check of Transition-Based Streett Automata

      • Alexandre Duret-Lutz, Denis Poitrenaud, Jean-Michel Couvreur

      Pages 213-227

   2. On Minimal Odd Rankings for Büchi Complementation

      • Hrishikesh Karmarkar, Supratik Chakraborty

      Pages 228-243

   3. Specification Languages for Stutter-Invariant Regular Properties

      • Christian Dax, Felix Klaedtke, Stefan Leue

      Pages 244-254

This book constitutes the proceedings of the 7th International Symposium on Automated Technology for Verification and Analysis, ATVA 2009, held in Macao, China, in October 2009. The 23 regular papers and 3 took papers presented together with 3 invited talks, were carefully reviewed and selected from 74 research papers and 10 tool papers submissions. The papers are organized in topical sections on state space reduction, tools, probabilistic systems, medley, temporal logic, abstraction and refinement, and fault tolerant systems.

• Action
• Analysis
• automata
• formal methods
• logic
• model checking
• petri nets
• program analysis
• req
• software engineering
• software verification
• systems analysis
• theorem proving
• validation
• verification
• algorithm analysis and problem complexity

• International Institute of Software Technology (UNI-IIST), United Nations University, Macao, China

  Zhiming Liu

• Department of Computer Science, Aalborg University, Aalborg, Denmark

  Anders P. Ravn

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