Cryptographic Hardware and Embedded Systems - CHES 2009

11th International Workshop Lausanne, Switzerland, September 6-9, 2009 Proceedings

Editors:

ISBN: 978-3-642-04137-2 (Print) 978-3-642-04138-9 (Online)

Table of contents (32 chapters)

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  1. Front Matter

    Pages -

  2. Software Implementations

    1. Book Chapter

      Pages 1-17

      Faster and Timing-Attack Resistant AES-GCM

    2. Book Chapter

      Pages 18-32

      Accelerating AES with Vector Permute Instructions

    3. Book Chapter

      Pages 33-48

      SSE Implementation of Multivariate PKCs on Modern x86 CPUs

    4. Book Chapter

      Pages 49-64

      MicroEliece: McEliece for Embedded Devices

  3. Invited Talk 1

    1. Book Chapter

      Pages 65-65

      Physical Unclonable Functions and Secure Processors

  4. Side Channel Analysis of Secret Key Cryptosystems

    1. Book Chapter

      Pages 66-80

      Practical Electromagnetic Template Attack on HMAC

    2. Book Chapter

      Pages 81-96

      First-Order Side-Channel Attacks on the Permutation Tables Countermeasure

    3. Book Chapter

      Pages 97-111

      Algebraic Side-Channel Attacks on the AES: Why Time also Matters in DPA

    4. Book Chapter

      Pages 112-127

      Differential Cluster Analysis

  5. Side Channel Analysis of Public Key Cryptosystems

    1. Book Chapter

      Pages 128-140

      Known–Plaintext–Only Attack on RSA–CRT with Montgomery Multiplication

    2. Book Chapter

      Pages 141-155

      A New Side-Channel Attack on RSA Prime Generation

  6. Side Channel and Fault Analysis Countermeasures

    1. Book Chapter

      Pages 156-170

      An Efficient Method for Random Delay Generation in Embedded Software

    2. Book Chapter

      Pages 171-188

      Higher-Order Masking and Shuffling for Software Implementations of Block Ciphers

    3. Book Chapter

      Pages 189-204

      A Design Methodology for a DPA-Resistant Cryptographic LSI with RSL Techniques

    4. Book Chapter

      Pages 205-219

      A Design Flow and Evaluation Framework for DPA-Resistant Instruction Set Extensions

  7. Invited Talk 2

    1. Book Chapter

      Pages 220-224

      Crypto Engineering: Some History and Some Case Studies

  8. Pairing-Based Cryptography

    1. Book Chapter

      Pages 225-239

      Hardware Accelerator for the Tate Pairing in Characteristic Three Based on Karatsuba-Ofman Multipliers

    2. Book Chapter

      Pages 240-253

      Faster \(\mathbb{F}_p\) -Arithmetic for Cryptographic Pairings on Barreto-Naehrig Curves

    3. Book Chapter

      Pages 254-271

      Designing an ASIP for Cryptographic Pairings over Barreto-Naehrig Curves

  9. New Ciphers and Efficient Implementations

    1. Book Chapter

      Pages 272-288

      KATAN and KTANTAN — A Family of Small and Efficient Hardware-Oriented Block Ciphers

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