Cryptographic Hardware and Embedded Systems - CHES 2002

4th International Workshop Redwood Shores, CA, USA, August 13–15, 2002 Revised Papers

  • Burton S. Kaliski
  • çetin K. Koç
  • Christof Paar
Conference proceedings CHES 2002

DOI: 10.1007/3-540-36400-5

Part of the Lecture Notes in Computer Science book series (LNCS, volume 2523)

Table of contents (43 papers)

  1. Front Matter
    Pages I-XIV
  2. Invited Talk

    1. CHES: Past, Present, and Future
      Jean-Jacques Quisquater
      Pages 1-1
  3. Attack Strategies

    1. Optical Fault Induction Attacks
      Sergei P. Skorobogatov, Ross J. Anderson
      Pages 2-12
    2. Template Attacks
      Suresh Chari, Josyula R. Rao, Pankaj Rohatgi
      Pages 13-28
    3. The EM Side—Channel(s)
      Dakshi Agrawal, Bruce Archambeault, Josyula R. Rao, Pankaj Rohatgi
      Pages 29-45
  4. Finite Field and Modular Arithmetic I

    1. Enhanced Montgomery Multiplication
      Shay Gueron
      Pages 46-56
    2. New Algorithm for Classical Modular Inverse
      Róbert Lórencz
      Pages 57-70
    3. Increasing the Bitlength of a Crypto-Coprocessor
      Wieland Fischer, Jean-Pierre Seifert
      Pages 71-81
  5. Elliptic Curve Cryptography I

  6. AES and AES Candidates

    1. 2Gbit/s Hardware Realizations of RIJNDAEL and SERPENT: A Comparative Analysis
      A.K. Lutz, J. Treichler, F.K. Gürkaynak, H. Kaeslin, G. Basler, A. Erni et al.
      Pages 144-158
    2. Efficient Software Implementation of AES on 32-Bit Platforms
      Guido Bertoni, Luca Breveglieri, Pasqualina Fragneto, Marco Macchetti, Stefano Marchesin
      Pages 159-171
    3. An Optimized S-Box Circuit Architecture for Low Power AES Design
      Sumio Morioka, Akashi Satoh
      Pages 172-186
    4. Simplified Adaptive Multiplicative Masking for AES
      Elena Trichina, Domenico De Seta, Lucia Germani
      Pages 187-197
    5. Multiplicative Masking and Power Analysis of AES
      Jovan D. Golić, Christophe Tymen
      Pages 198-212
  7. Tamper Resistance

  8. RSA Implementation

    1. A DPA Attack against the Modular Reduction within a CRT Implementation of RSA
      Bert den Boer, Kerstin Lemke, Guntram Wicke
      Pages 228-243
    2. Further Results and Considerations on Side Channel Attacks on RSA
      Vlastímil Klíma, Tomáš Rosa
      Pages 244-259

About these proceedings

Introduction

ThesearetheproceedingsofCHES2002,theFourthWorkshoponCryptographic Hardware and Embedded Systems. After the ?rst two CHES Workshops held in Massachusetts, and the third held in Europe, this is the ?rst Workshop on the West Coast of the United States. There was a record number of submissions this year and in response the technical program was extended to 3 days. As is evident by the papers in these proceedings, there have been again many excellent submissions. Selecting the papers for this year’s CHES was not an easy task, and we regret that we could not accept many contributions due to the limited availability of time. There were 101 submissions this year, of which 39 were selected for presentation. We continue to observe a steady increase over previous years: 42 submissions at CHES ’99, 51 at CHES 2000, and 66 at CHES 2001. We interpret this as a continuing need for a workshop series that c- bines theory and practice for integrating strong security features into modern communicationsandcomputerapplications. Inadditiontothesubmittedcont- butions, Jean-Jacques Quisquater (UCL, Belgium), Sanjay Sarma (MIT, USA) and a panel of experts on hardware random number generation gave invited talks. As in the previous years, the focus of the Workshop is on all aspects of cr- tographic hardware and embedded system security. Of special interest were c- tributionsthatdescribenewmethodsfore?cienthardwareimplementationsand high-speed software for embedded systems, e. g. , smart cards, microprocessors, DSPs, etc. CHES also continues to be an important forum for new theoretical and practical ?ndings in the important and growing ?eld of side-channel attacks.

Keywords

DES Error-correcting Code FPGA-based attacks Hardware IT architecture Radio-Frequency Identification (RFID) architecture calculus cryptanalysis cryptographic hardware embedded cyrptographic systems network security robust security security systems security

Editors and affiliations

  • Burton S. Kaliski
    • 1
  • çetin K. Koç
    • 2
  • Christof Paar
    • 3
  1. 1.RSA LaboratoriesBedfordUSA
  2. 2.Oregon State UniversityOregonUSA
  3. 3.Ruhr-Universität BochumBochumGermany

Bibliographic information

  • Copyright Information Springer-Verlag Berlin Heidelberg 2003
  • Publisher Name Springer, Berlin, Heidelberg
  • eBook Packages Springer Book Archive
  • Print ISBN 978-3-540-00409-7
  • Online ISBN 978-3-540-36400-9
  • Series Print ISSN 0302-9743