Field Programmable Logic and Applications

9th International Workshop, FPL’99, Glasgow, UK, August 30 - September 1, 1999. Proceedings

Editors:

ISBN: 978-3-540-66457-4 (Print) 978-3-540-48302-1 (Online)

Table of contents (65 chapters)

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  1. Front Matter

    Pages -

  2. Signal Processing

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      Pages 1-10

      Reconfigurable Processors for High-Performance, Embedded Digital Signal Processing

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      Pages 11-20

      Auditory Signal Processing in Hardware

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      Pages 21-30

      SONIC – A Plug-In Architecture for Video Processing

  3. CAD Tools for DRL

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      Pages 31-40

      DRIVE: An Interpretive Simulation and Visualization Environment for Dynamically Reconfigurable Systems

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      Pages 41-50

      Modelling and Synthesis of Configuration Controllers for Dynamically Reconfigurable Logic Systems Using the DCS CAD Framework

  4. Optimization Studies

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      Pages 51-60

      Optimal Finite Field Multipliers for FPGAs

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      Pages 61-70

      Memory Access Optimization and RAM Inference for Pipeline Vectorization

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      Pages 71-80

      Analysis and Optimization of 3-D FPGA Design Parameters

  5. Physical Design

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      Pages 81-90

      Tabu Search: Ultra-Fast Placement for FPGAs

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      Pages 91-100

      Placement Optimization Based on Global Routing Updating for System Partitioning onto Multi-FPGA Mesh Topologies

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      Pages 101-110

      Hierarchical Interactive Approach to Partition Large Designs into FPGAs

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      Pages 111-123

      Logical-to-Physical Memory Mapping for FPGAs with Dual-Port Embedded Arrays

  6. Dynamically Reconfigurable Logic

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      Pages 124-133

      DYNASTY: A Temporal Floorplanning Based CAD Framework for Dynamically Reconfigurable Logic Systems

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      Pages 134-143

      A Bipartitioning Algorithm for Dynamic Reconfigurable Programmable Logic

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      Pages 144-154

      Self Controlling Dynamic Reconfiguration: A Case Study

  7. Design Tools

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      Pages 155-164

      An Internet Based Development Framework for Reconfigurable Computing

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      Pages 165-174

      On Tool Integration in High-Performance FPGA Design Flows

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      Pages 175-184

      Hardware-Software Codesign for Dynamically Reconfigurable Architectures

  8. Reconfigurable Computing

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      Pages 185-194

      Serial Hardware Libraries for Reconfigurable Designs

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      Pages 195-204

      Reconfigurable Computing in Remote and Harsh Environments

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