SOC (System-on-a-Chip) Testing for Plug and Play Test Automation

Editors:

ISBN: 978-1-4419-5307-0 (Print) 978-1-4757-6527-4 (Online)

Table of contents (13 chapters)

  1. Front Matter

    Pages i-vii

  2. Overview

    1. No Access

      Book Chapter

      Pages 1-19

      On IEEE P1500’s Standard for Embedded Core Test

  3. Test Planning, Access and Scheduling

    1. No Access

      Book Chapter

      Pages 21-36

      An Integrated Framework for the Design and Optimization of SOC Test Solutions

    2. No Access

      Book Chapter

      Pages 37-50

      On Concurrent Test of Core-Based SOC Design

    3. No Access

      Book Chapter

      Pages 51-70

      A Novel Reconfigurable Wrapper for Testing of Embedded Core-Based SOCs and its Associated Scheduling Algorithm

    4. No Access

      Book Chapter

      Pages 71-90

      The Role of Test Protocols in Automated Test Generation for Embedded-Core-Based System ICs

    5. No Access

      Book Chapter

      Pages 91-109

      CAS-BUS: A Test Access Mechanism and a Toolbox Environment for Core-Based System Chip Testing

    6. No Access

      Book Chapter

      Pages 111-121

      An Integrated Approach to Testing Embedded Cores and Interconnects Using Test Access Mechanism (TAM) Switch

    7. No Access

      Book Chapter

      Pages 123-137

      Design for Consecutive Testability of System-on-a-Chip with Built-In Self Testable Cores

  4. Test Data Compression

    1. No Access

      Book Chapter

      Pages 139-150

      Deterministic Test Vector Compression/Decompression for Systems-on-a-Chip Using an Embedded Processor

    2. No Access

      Book Chapter

      Pages 151-163

      Diagnostic Data Compression Techniques for Embedded Memories with Built-In Self-Test

  5. Interconnect, Crosstalk and Signal Integrity

    1. No Access

      Book Chapter

      Pages 165-174

      Testing for Interconnect Crosstalk Defects Using On-Chip Embedded Processor Cores

    2. No Access

      Book Chapter

      Pages 175-190

      Signal Integrity: Fault Modeling and Testing in High-Speed SoCs

    3. No Access

      Book Chapter

      Pages 191-200

      On-Chip Clock Faults’ Detector