Multi-Objective Optimization in Physical Synthesis of Integrated Circuits

Authors:

ISBN: 978-1-4614-1355-4 (Print) 978-1-4614-1356-1 (Online)

Table of contents (10 chapters)

  1. Front Matter

    Pages i-ix

  2. Introduction and Prior Art

    1. Front Matter

      Pages 1-1

    2. No Access

      Book Chapter

      Pages 3-9

      Timing Closure for Multi-Million-Gate Integrated Circuits

    3. No Access

      Book Chapter

      Pages 11-18

      State of the Art in Physical Synthesis

  3. Local Physical Synthesis and Necessary Analysis Techniques

    1. Front Matter

      Pages 19-19

    2. No Access

      Book Chapter

      Pages 21-46

      Buffer Insertion During Timing-Driven Placement

    3. No Access

      Book Chapter

      Pages 47-63

      Bounded Transactional Timing Analysis

    4. No Access

      Book Chapter

      Pages 65-80

      Gate Sizing During Timing-Driven Placement

  4. Broadening the Scope of Circuit Transformations

    1. Front Matter

      Pages 81-81

    2. No Access

      Book Chapter

      Pages 83-103

      Physically-Driven Logic Restructuring

    3. No Access

      Book Chapter

      Pages 105-122

      Logic Restructuring as an Aid to Physical Retiming

    4. No Access

      Book Chapter

      Pages 123-132

      Broadening the Scope of Optimization Using Partitioning

    5. No Access

      Book Chapter

      Pages 133-148

      Co-Optimization of Latches and Clock Networks

    6. No Access

      Book Chapter

      Pages 149-155

      Conclusions