Embedded Systems Specification and Design Languages

Selected contributions from FDL’07


ISBN: 978-1-4020-8296-2 (Print) 978-1-4020-8297-9 (Online)

Table of contents (19 chapters)

  1. Front Matter

    Pages i-ix

  2. C/C++ Based System Design

    1. Chapter

      Pages 3-13

      How Different Are Esterel and SystemC

    2. Chapter

      Pages 15-29

      Timed Asynchronous Circuits Modeling and Validation Using SystemC

    3. Chapter

      Pages 31-43

      On Construction of Cycle Approximate Bus TLMs

    4. Chapter

      Pages 45-58

      Combinatorial Dependencies in Transaction Level Models

    5. Chapter

      Pages 59-71

      An Integrated SystemC Debugging Environment

    6. Chapter

      Pages 73-86

      Measuring the Quality of a SystemC Testbench by Using Code Coverage Techniques

    7. Chapter

      Pages 87-103

      SystemC-Based Simulation of the MICAS Architecture

  3. Analog, Mixed-Signal, and Heterogeneous System Design

    1. Chapter

      Pages 107-121

      Heterogeneous Specification with HetSC and SystemC-AMS: Widening the Support of MoCs in SystemC

    2. Chapter

      Pages 123-136

      An Extension to VHDL-AMS for AMS Systems with Partial Differential Equations

    3. Chapter

      Pages 137-152

      Mixed-Level Modeling Using Configurable MOS Transistor Models

  4. UML-Based System Specification and Design

    1. Chapter

      Pages 155-168

      Modeling AADL Data Communications with UML MARTE

    2. Chapter

      Pages 169-182

      Software Real-Time Resource Modeling

    3. Chapter

      Pages 183-198

      Model Transformations from a Data Parallel Formalism Towards Synchronous Languages

    4. Chapter

      Pages 199-209

      UML and SystemC – A Comparison and Mapping Rules for Automatic Code Generation

    5. Chapter

      Pages 211-226

      An Enhanced SystemC UML Profile for Modeling at Transaction-Level

    6. Chapter

      Pages 227-239

      SC2 StateCharts to SystemC: Automatic Executable Models Generation

  5. Formalisms for Property-Driven Design

    1. Chapter

      Pages 243-253

      Asynchronous On-Line Monitoring of Logical and Temporal Assertions

    2. Chapter

      Pages 255-270

      Transactor-Based Formal Verification of Real-Time Embedded Systems

    3. Chapter

      Pages 271-275

      A Case-Study in Property-Based Synthesis: Generating a Cache Controller from a Property-Set