Book Volume 2162 2001

Cryptographic Hardware and Embedded Systems — CHES 2001

Third International Workshop Paris, France, May 14–16, 2001 Proceedings


ISBN: 978-3-540-42521-2 (Print) 978-3-540-44709-2 (Online)

Table of contents (33 chapters)

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  1. Front Matter

    Pages I-XIV

  2. Invited Talk

    1. Chapter

      Pages 1-2

      Protecting Embedded Systems— The Next Ten Years

  3. Side Channel Attacks I

    1. Chapter

      Pages 3-15

      A Sound Method for Switching between Boolean and Arithmetic Masking

    2. Chapter

      Pages 16-27

      Fast Primitives for Internal Data Scrambling in Tamper Resistant Hardware

    3. Chapter

      Pages 28-38

      Random Register Renaming to Foil DPA

    4. Chapter

      Pages 39-50

      Randomized Addition-Subtraction Chains as a Countermeasure against Power Attacks

  4. Rijndael Hardware Implementations

    1. Chapter

      Pages 51-64

      Architectural Optimization for a 1.82Gbits/sec VLSI Implementation of the AES Rijndael Algorithm

    2. Chapter

      Pages 65-76

      High Performance Single-Chip FPGA Rijndael Algorithm Implementations

    3. Chapter

      Pages 77-92

      Two Methods of Rijndael Implementation in Reconfigurable Hardware

  5. Random Number Generators

    1. Chapter

      Pages 93-102

      Pseudo-random Number Generation on the IBM 4758 Secure Crypto Coprocessor

    2. Chapter

      Pages 103-117

      Efficient Online Tests for True Random Number Generators

  6. Elliptic Curve Algorithms

    1. Chapter

      Pages 118-125

      The Hessian Form of an Elliptic Curve

    2. Chapter

      Pages 126-141

      Efficient Elliptic Curve Cryptosystems from a Scalar Multiplication Algorithm with Recovery of the y-Coordinate on a Montgomery-Form Elliptic Curve

    3. Chapter

      Pages 142-158

      Generating Elliptic Curves of Prime Order

  7. Invited Talk

    1. Chapter

      Pages 159-159

      New Directions in Croptography

  8. Arithmetic Architectures

    1. Chapter

      Pages 160-170

      A New Low Complexity Parallel Multiplier for a Class of Finite Fields

    2. Chapter

      Pages 171-184

      Efficient Rijndael Encryption Implementation with Composite Field Arithmetic

    3. Chapter

      Pages 185-201

      High-Radix Design of a Scalable Modular Multiplier

    4. Chapter

      Pages 202-219

      A Bit-Serial Unified Multiplier Architecture for Finite Fields GF(p) and GF(2m)

  9. Cryptanalysis

    1. Chapter

      Pages 220-234

      Attacks on Cryptoprocessor Transaction Sets

    2. Chapter

      Pages 235-250

      Bandwidth-Optimal Kleptographic Attacks

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