Abstract
Tree search is a widely used fundamental algorithm. Modern processors provide tremendous computing power by integrating multiple cores, each with a vector processing unit. This paper reviews some studies on exploiting single instruction multiple date (SIMD) capacity of processors to improve the performance of tree search, and proposes several improvement methods on reported SIMD tree search algorithms. Based on blocking tree structure, blocking for memory alignment and dynamic blocking prefetch are proposed to optimize the overhead of memory access. Furthermore, as a way of non-linear loop unrolling, the search branch unwinding shows that the number of branches can exceed the data width of SIMD instructions in the SIMD search algorithm. The experiments suggest that blocking optimized SIMD tree search algorithm can achieve 1.6 times response speed faster than the un-optimized algorithm.
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Project supported by the Shanghai Leading Academic Discipline Project (Grant No.J50103), and the Graduate Student Innovation Foundation of Shanghai University (Grant No.SHUCX112167)
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Zhang, Z., Lu, Yf., Shen, Wf. et al. Blocking optimized SIMD tree search on modern processors. J. Shanghai Univ.(Engl. Ed.) 15, 437–444 (2011). https://doi.org/10.1007/s11741-011-0765-2
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DOI: https://doi.org/10.1007/s11741-011-0765-2