Abstract
Medical image processing in general and computerized tomography (CT) in particular can benefit greatly from hardware acceleration. This application domain is marked by computationally intensive algorithms requiring the rapid processing of large amounts of data. To date, reconfigurable hardware has not been applied to the important area of image reconstruction. For efficient implementation and maximum speedup, fixed-point implementations are required. The associated quantization errors must be carefully balanced against the requirements of the medical community. Specifically, care must be taken so that very little error is introduced compared to floating-point implementations and the visual quality of the images is not compromised. In this paper, we present an FPGA implementation of the parallel-beam backprojection algorithm used in CT for which all of these requirements are met. We explore a number of quantization issues arising in backprojection and concentrate on minimizing error while maximizing efficiency. Our implementation shows approximately 100 times speedup over software versions of the same algorithm running on a 1 GHz Pentium, and is more flexible than an ASIC implementation. Our FPGA implementation can easily be adapted to both medical sensors with different dynamic ranges as well as tomographic scanners employed in a wider range of application areas including nondestructive evaluation and baggage inspection in airport terminals.
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Miriam Leeser is an Associate Professor at Northeastern University, Department of Electrical and Computer Engineering. She received her BS degree in Electrical Engineering from Cornell University, and Diploma and Ph.D. Degrees in Computer Science from Cambridge University in England. After completion of her Ph.D., she joined Cornell University, Department of Electrical Engineering as an Assistant Professor. In January, 1996 she joined the faculty of Northeastern University, where she is a member of the Center for Communications and Digital Signal Processing and the Computer Engineering group, and head of the Rapid Prototyping Laboratory. In 1992 she received an NSFYoung Investigator Award. Her research interests include hardware description languages, high level synthesis, and reconfigurable computing for signal and image processing applications. She is a senior member of the IEEE, and a member of the ACM.
Srdjan Coric graduated from Northeastern University in 2002 with an MS degree in Computer Engineering. While at Northeastern, Srdjan worked as a teaching assistant in Microprocessor and Digital Design Laboratories, and as a research assistant in the Rapid Prototyping Lab. The focus of his research was on applications of the FPGA technology in the domain of image processing. Prior to that, Srdjan worked on implementing neural networks in FPGAs at Lola Institute, Belgrade. He holds a BSc degree from School of Electrical Engineering, University of Belgrade, Serbia.
Eric L. Miller received the S.B. in 1990, the S.M. in 1992, and the Ph.D. degree in 1994 all in Electrical Engineering and Computer Science at the Massachusetts Institute of Technology, Cambridge, MA. He is currently an Associate Professor in the Department of Electrical and Computer Engineering at Northeastern University. His research interests include the use of multiscale and statistical methods for the solution of inverse problems in general and inverse scattering problems in particular as well as the development of computationally efficient, physically-based models for use in applications such as medical imaging, nondestructive evaluation, and environmental monitoring and remediation.
Dr. Miller is a member of Tau Beta Pi, Eta Kappa Nu, and Phi Beta Kappa. He received the CAREER Award from the National Science Foundation in 1996 and the Outstanding Research Award in the College of Engineering at Northeastern University in 2002. Dr. Miller is a Senior Member of the IEEE. He is currently an Associate Editor with the IEEE Transactions on Geoscience and Remote Sensing and served in the same capacity for the IEEE Transactions on Image Processing from 1998–2002.
Haiqian Yu received her BS and MS degrees in Electrical Engineering in 1997 and 2000 from Fudan University P.R.C., respectively. She is currentlyworking toward the PhD degree in Electrical Engineering at Northeastern University, USA. She has been a Research Assistant in the Rapid Prototyping Lab since 2001. Her current research interests are in the area of digital circuit and system design, recon-figurable hardware implementation and digital signal processing.
Marc Trepanier is a principal systems engineer with Mercury Computer Systems’ Product Planning group. He has many years experience as a system engineer working on radar, infrared, visual, and EW systems. Prior to joining Mercury, Marc spent two years working at Sanders–A Lockheed Martin Company–as a system engineer on various electronic warfare programs. He has a BSEE from the University of New Hampshire and an MSEE from Syracuse University.
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Leeser, M., Coric, S., Miller, E. et al. Parallel-Beam Backprojection: An FPGA Implementation Optimized for Medical Imaging. J VLSI Sign Process Syst Sign Image Video Technol 39, 295–311 (2005). https://doi.org/10.1007/s11265-005-4846-5
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DOI: https://doi.org/10.1007/s11265-005-4846-5