, Volume 53, Issue 3, pp 115-125

Exact emulation of a priority queue with a switch and delay lines

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Abstract

All-optical packet switched networking is hampered by the problem of realizing viable queues for optical packets. Packets can be buffered in delay lines, but delay lines do not functionally emulate queues from an input-output point of view. In this paper we consider the problem of exact emulation of a priority queue of size K using a switching system comprised of a switch of size (M + 1) × (M + 1), which has one distinguished input for external arrivals, one distinguished output for external departures, and fixed-length delay lines of lengths L 1, L 2, ..., L M connecting the other inputs and outputs in pairs. We measure the complexity of such an emulation by M + 1. We prove that \(M \ge \lceil \log (K -1) \rceil\) and present a construction which works with \(M = O(\sqrt{K})\) ; further, in our construction \(\sum_{m=1}^M L_m = K + O(\sqrt{K})\) . We also sketch an idea for an all-optical packet switched communication network architecture based on approximate emulation of priority queues of finite size using switches and delay lines, with erasure control coding at the packet level.

AMS 2000 subject classifications: Primary: 60K25; Secondary: 90B22 · 90B36 · 68R99
The work of A. D. Sarwate is supported by an NDSEG Graduate Research Fellowship which is sponsored by the U.S. Department of Defense.
The work of V. Anantharam is supported by ONR grant No. N00014-1-0637, DARPA grant No. N66001-00-C-8062, and by NSF grant No. ECS 0123512.