Exact emulation of a priority queue with a switch and delay lines
 A. D. Sarwate,
 V. Anantharam
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Alloptical packet switched networking is hampered by the problem of realizing viable queues for optical packets. Packets can be buffered in delay lines, but delay lines do not functionally emulate queues from an inputoutput point of view. In this paper we consider the problem of exact emulation of a priority queue of size K using a switching system comprised of a switch of size (M + 1) × (M + 1), which has one distinguished input for external arrivals, one distinguished output for external departures, and fixedlength delay lines of lengths L _{1}, L _{2}, ..., L _{ M } connecting the other inputs and outputs in pairs. We measure the complexity of such an emulation by M + 1. We prove that \(M \ge \lceil \log (K 1) \rceil\) and present a construction which works with \(M = O(\sqrt{K})\) ; further, in our construction \(\sum_{m=1}^M L_m = K + O(\sqrt{K})\) . We also sketch an idea for an alloptical packet switched communication network architecture based on approximate emulation of priority queues of finite size using switches and delay lines, with erasure control coding at the packet level.
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 Title
 Exact emulation of a priority queue with a switch and delay lines
 Journal

Queueing Systems
Volume 53, Issue 3 , pp 115125
 Cover Date
 20060701
 DOI
 10.1007/s111340066669x
 Print ISSN
 02570130
 Online ISSN
 15729443
 Publisher
 Kluwer Academic Publishers
 Additional Links
 Topics
 Keywords

 Erasure control coding
 Error control coding
 Networking
 Optical networking
 Priority queues
 Queueing
 Switching
 Industry Sectors
 Authors

 A. D. Sarwate ^{(1)}
 V. Anantharam ^{(1)}
 Author Affiliations

 1. Department of Electrical Engineering and Computer Sciences, University of California, Berkeley