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A 5–7 GHz current reuse and gm-boosted common gate low noise amplifier with LC based ESD protection in 32 nm CMOS

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Abstract

Scaling of minimum length of the MOSFET has improved its performance but has reduced the breakdown voltage which makes it prone to Electrostatic Discharge (ESD) damage. This work presents a low-power g m -boosted common gate (CG) ultra wideband (UWB) low noise amplifier (LNA) architecture, operating in the 5–7 GHz range, employing current-reuse technique with LC based Electrostatic Discharge (ESD) protection. Common gate topology supports wide band input matching and noise figure independent of operating frequency. A PMOS common source topology is used as the gm-boosting stage in order to reduce the noise figure and to remove the dependency of noise figure from the bias point. The gm-boosting stage and the amplifier share common bias current to reduce the power consumption of the LNA. A shunt inductor, series capacitor and power clamp are used for protecting the circuit from ESD damage. The ESD circuit is co-designed with the input matching network in order to reduce the area of the layout. The proposed topology has shown significant improvement in gain and noise figure with ESD protection.

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Correspondence to Sriharsha Ankathi.

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Ankathi, S., Vignan, S., Athukuri, S. et al. A 5–7 GHz current reuse and gm-boosted common gate low noise amplifier with LC based ESD protection in 32 nm CMOS. Analog Integr Circ Sig Process 90, 573–589 (2017). https://doi.org/10.1007/s10470-016-0915-x

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  • DOI: https://doi.org/10.1007/s10470-016-0915-x

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