Abstract
This work presents a resistorless self-biased and small area sub-bandgap voltage reference that works in the nano-ampere consumption range with 0.75 V of power supply. The circuit applies a curvature compensation technique that allows an extended temperature range without compromising the temperature stability. The behavior of the circuit is analytically described, and a design methodology is proposed which allows the separate adjustment of the bipolar junction transistor bias current and its curvature compensation. Simulation results are presented for a 180 nm CMOS process, where a reference voltage of 469 mV is designed, with a temperature coefficient of 5 ppm/°C for the −40 to 125 °C extended temperature range. The power consumption of the whole circuit is 16.3 nW under a 0.75 V power supply at 27 °C. The estimated silicon area is 0.0053 mm2.
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The authors are grateful to MOSIS Education Program, CNPq and CAPES brazilian agencies, CI-BRASIL Program and NSCAD Microelectronics for support
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Gomez Caicedo, J.A., Mattia, O.E., Klimach, H. et al. 0.75 V supply nanowatt resistorless sub-bandgap curvature-compensated CMOS voltage reference. Analog Integr Circ Sig Process 88, 333–345 (2016). https://doi.org/10.1007/s10470-016-0722-4
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DOI: https://doi.org/10.1007/s10470-016-0722-4