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A 10 Gb/s adaptive analog decision feedback equalizer for multimode fiber dispersion compensation in 0.13 \({\upmu }\)m CMOS

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Abstract

A 10 Gb/s adaptive analog decision feedback equalizer with 6 taps is realized in 0.13 \(\upmu\)m CMOS. An analog implementation of the LMS algorithm is used to continuously adapt the feedback filter coefficients. A clock and data recovery circuit is used to extract the clock from the DFE output. The adaptive DFE dissipates 318 mW, not including output buffers, and can equalize PRBS data corrupted by a 300-m multimode fiber achieving BER \(< 10^{-13}\).

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Authors and Affiliations

  1. UCLA Anderson School of Management, Los Angeles, USA

    Mahyar Kargar

  2. MaXcentric Technologies, LLC, 737 Pearl St., Ste. 208, La Jolla, CA, 92037, USA

    Pouria Khaliliadl

  3. Department of EECS, University of California, Irvine, 4428 Engineering Hall, Irvine, CA, 92697-2625, USA

    Michael M. Green

Authors
  1. Mahyar Kargar
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  2. Pouria Khaliliadl
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  3. Michael M. Green
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Correspondence to Michael M. Green.

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Kargar, M., Khaliliadl, P. & Green, M.M. A 10 Gb/s adaptive analog decision feedback equalizer for multimode fiber dispersion compensation in 0.13 \({\upmu }\)m CMOS. Analog Integr Circ Sig Process 83, 271–283 (2015). https://doi.org/10.1007/s10470-015-0528-9

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  • DOI: https://doi.org/10.1007/s10470-015-0528-9

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