Abstract
This paper describes a 10-bit 1.8 V 45 mW 100 MHz transmitter chip (TX chip) that is fabricated using 0.18 μm 1P6 M CMOS technology for use in an xDSL modem in a home network. The chip is composed of a 10-bit segmented digital-to-analog converter (DAC) and a fully differential adaptive line driver (LD). In designing the DAC, the switched-current method is used to increase the conversion speed; the anti-process-variation current cell with threshold-voltage compensation is used to reduce the linearity error, and the current cell, with differential input and gain boosting, is used to minimize the feedthrough error and tapered error distribution. The circuit layout of the current source has four-phase symmetry, not only to increase the linearity but also to eliminate the gradient error. To design a fully differential adaptive LD, the feed-forward capacitor and quiescent current control circuit are used to reduce the zero-crossing distortion and to minimize the second-order harmonic. Additionally, the power efficiency is increased using an output-impedance matching circuit. Measurements reveal that, for a TX chip at a differential load of 100 Ω and a supplied voltage of 1.8 V, the efficient number of bits, operating frequency, output voltage, output current, power consumption, differential nonlinearity error and integral nonlinearity error are 9 bits, 100 MHz, ± 0.874 V, ± 10 mA, 45.8 mW, −0.80 to +0.62 LSB, and −0.92 to +0.82 LSB, respectively.
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Sung, GM., Chou, WD. & Yu, CP. A 10-bit 1.8 V 45 mW 100 MHz CMOS transmitter chip for use in an XDSL modem in a home network. Analog Integr Circ Sig Process 81, 515–527 (2014). https://doi.org/10.1007/s10470-014-0398-6
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DOI: https://doi.org/10.1007/s10470-014-0398-6