Platform-based mixed signal design: Optimizing a high-performance pipelined ADC
Rent the article at a discountRent now
* Final gross prices may vary according to local VAT.Get Access
We apply Platform-Based Design (PBD) to the power optimization of a 14 bit, 80 MS/s pipelined Analog-to-Digital Converter (ADC) in a mixed signal formulation. A platform is a library of components and interconnects, each characterized with a set of behavioral, performance and composition models, that is used to raise the level of abstraction to enable system-level design. PBD is a meet-in-the-middle methodology that consists of two phases. The bottom-up phase generates a set of platform libraries that are exploited in the system hierarchy. The top-down phase allows exploring feasible solutions within the platform libraries and selecting the optimum implementation. To evaluate the cost of each implementation, the behavioral models available through platform abstraction are used both for digital and analog components. We provide an example of the use of the methodology and its features for analog circuits by modeling two amplifiers with different topologies as analog components, showing details of the analog characterization process. Then, we create a mixed signal platform library as a combination of an analog and a digital platform (bottom-up phase). The top-down phase performs optimization across the analog/digital boundary to minimize power consumption constrained to given noise and linearity requirements. Simulation results show that interesting power saving can be achieved, as much as 64% compared with an original hand-optimized ADC.
- F. Balarin, Y. Watanabe, H. Hsieh, L. Lavagno, C. Passerone, and A. Sangiovanni Vincentelli, “Metropolis: An integrated electronic system design environment.” Computer, pp. 45–52, 2003.
- A. Sangiovanni Vincentelli, L. Carloni, F. De Bernardinis, and M. Sgroi, “Benefits and challenges for platform-based design.” In Proceedings of DAC, 2004, pp. 409–414.
- F. De Bernardinis and A. Sangiovanni Vincentelli, “A methodology for system-level analog design space exploration.” In Proceedings of DATE, 2004.
- F. De Bernardinis, S. Gambini, F. Vincis, F. Svelto, R. Castello, and A. Sangiovanni Vincentelli, “Design space exploration for a UMTS front-end exploiting analog platforms.” In Proceedings of IEEE International Conference on Computer Aided Design, 2004.
- F. De Bernardinis, P. Nuzzo, and A. Sangiovanni Vincentelli, “Mixed signal design space exploration through analog platforms.” In Proceedings of DAC, 2005.
- B. Murmann and B.E. Boser, “A 12-bit 75-MS/s, Pipelined ADC Using Open-Loop Residue Amplification.” IEEE Journal of Solid-State Circuits, vol. 38, pp. 2040–2050, 2003.
- X. Wang, P.J. Hurst, and S.H. Lewis, “A 12-bit 20-Msample/s pipelined analog-to-digital converter with nested digital background calibration.” IEEE Journal of Solid-State Circuits, vol. 39, pp. 1799–1808, 2004.
- S.H. Lewis, “Optimizing the stage resolution in pipelined, multistage, analog-to-digital converters for video-rate applications.” IEEE trans. on Circuits and Systems-II, vol. 39, pp. 516–523,1992.
- J. Goes, J.C. Vital, and J.E. Franca, “Systematic design for optimization of high-speed self-calibrated pipelined A/D converters.” IEEE Trans. on Circuits and Systems-II, vol. 45, pp. 1513–1526,1998.
- P.T.F. Kwok and H.C. Luong, “Power optimization for pipeline analog-to-digital converters.” IEEE Trans. on Circuits and Systems-II, vol. 46, pp. 549–553, 1999.
- R. Lotfi, M. Taherzadeh-Sani, and O. Shoaei, “A 12-bit 40 Msps 3.3-V 56-mW pipelined A/D converter in 0.25-μm CMOS.” In Proceedings of IEEE International Symposium on Circuits and Systems, 2004, pp. I-69–I-72.
- L.R. Carley, P. Fung, P. Donehue, and A.A. Biyabani, “Numerical optimization-based synthesis of pipelined A/D converters.” In Proceedings of IEEE, 1992, pp. 2152–2155.
- M. Hershenson, “Design of pipeline analog-to-digital converters via geometric programming.” In Proceedings of IEEE International Conference on Computer Aided Design, 2002, pp. 317– 324.
- M. Gustavsson, J.J. Wikner, and N.N. Tan, CMOS Data Converters for Communications. Kluwer Academic Publishers, 2000.
- I. Galton, “Digital cancellation of D/A converter noise in pipelined A/D converters.” IEEE Trans. on Circuits and Systems-II, vol. 47, pp. 185–196, 2000.
- P. Nuzzo, F. De Bernardinis, and P. Terreni, “Optimization of ADC power consumption using digital calibration.” In Proc. of the Int. Conf. on Signals and Electronics Systems, 2004, pp. 213– 216.
- L. Carloni, F. De Bernardinis, A. Sangiovanni Vincentelli, and M. Sgroi, “The art and science of integrated systems design.” In Proceedings of ESSCIRC, 2002, pp. 25–36.
- F. De Bernardinis, M. Jordan, and A. Sangiovanni Vincentelli, “Support vector machines for analog circuit performance representation.” In Proc. of DAC, 2003.
- F. De Bernardinis and A. Sangiovanni Vincentelli, “Efficient analog platform characterization through analog constraint graphs.” In Proceedings of IEEE International Conference on Computer Aided Design, 2005.
- K. Swings and W. Sansen, “Donald: A workbench for interactive design space exploration and sizing of analog circuits.” In Proc. of the European Conf. on Design Automation, 1991, pp. 475–479.
- P. Nuzzo, F. De Bernardinis, P. Terreni, and A. Sangiovanni Vincentelli, “Enriching an analog platform for analog-to-digital converter design.” In Proceedings of IEEE International Symposium on Circuits and Systems, 2005.
- P.R. Gray, P.J. Hurst, S.H. Lewis, and R.G. Meyer, Analysis and Design of Analog Integrated Circuits. John Wiley & Sons, Inc., 2001.
- P. Wambacq and W. Sansen, Distorsion Analysis of Analog Integrated Circuits. Boston, MA: Kluwer Academic Publishers, 1998.
- F. De Bernardinis, F. Vincis, S. Gambini, P. Terreni, and A. Sangiovanni Vincentelli, “A framework for analog platform characterization.” In Proc. of the Int. Conf. on Signals and Electronics Systems, 2004, pp. 99–102.
- W. Liu, X. Jin, M. Chen, et al., BSIM3v3.2.2 MOSFET Model-Users' Manual. Department of Electrical Engineering and Computer Sciences, University of California, Berkeley, CA 94720, 1999.
- E. Lauwers, K. Lampaert, P. Miliozzi, and G. Gielen, “High-level design case of a switched-capacitor low-pass filter using Verilog-A.” In Proceedings of IEEE/ACM International Workshop on Behavioral Modeling and Simulation, 2000, pp. 16– 21.
- P. Malcovati, S. Brigati, F. Francesconi, F. Maloberti, et al., “Behavioral modeling of switched-capacitor sigma–delta modulators.” IEEE Trans. on Circuits and Systems-I, vol. 50, pp. 352–364, 2003.
- G. Wegmann, E. Vittoz, and F. Rahali, “Charge injection in analog MOS switches.” IEEE Journal of Solid-State Circuits, vol. SC-22, pp. 1091–1097, 1987.
- L. Ingber, “Very fast simulated re-annealing.” Mathematical Computer Modelling, no. 8, pp. 967–973, 1989.
- X. Li, J. Wang, L.T. Pileggi, W. Chiang and T. Chen, “Performance centering optimization for system-level analog design exploration.” In Proceedings of IEEE International Conference on Computer Aided Design, 2005.
- Platform-based mixed signal design: Optimizing a high-performance pipelined ADC
Analog Integrated Circuits and Signal Processing
Volume 49, Issue 3 , pp 343-358
- Cover Date
- Print ISSN
- Online ISSN
- Kluwer Academic Publishers
- Additional Links
- Platform-based design
- Pipelined analog-to-digital converter
- Digital calibration
- System level optimization
- Industry Sectors