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Optimizing an on-chip boost DC–DC converter with an on-chip or on-board inductor

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Abstract

This study is dedicated to develop an on-chip DC–DC boost converter with on-chip or on-board inductors to provide steady high voltage biases from 2.8 to 5 V to drive the gate drivers for advanced liquid crystal displays. Note that the off-chip inductor as compared to the on-chip one inevitably occupies substantial board area and leads to negative effects of electro-magnetic interference (EMI). This study also intends to find optimal design of the on-chip or on-board inductors for an on-chip DC–DC converter in order to provide required large instantaneous currents, while minimizing negative impacts from the off-chip inductance. Parametric studies are conducted to successfully find optimal designs, including optimal switching frequency and duty. The optimization process is further standardized for future commercialization. The optimized DC–DC converters are taped out via the TSMC 0.35 μm CMOS process technology to validate the proposed design. Experiments are carried out for validating the performance of tape-out chips. The results clearly show the effectiveness of the designs and consistency to expectations.

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References

  • Andersen TM, Zingerli CM, Krismer F, Kolar JW, O’Mathuna C (2011) Inductor optimization procedure for power supplying package and power supply on chip. In: Energy conversion congress and exposition, pp 1320–1327

  • Callemeyn P, De Jonghe D, Gielen G, Steyaert M (2012) Optimization of fully-integrated power converter circuits comprising tapered inductor layout and temperature effects. In: International conference on synthesis, modeling, analysis and simulation methods and applications to circuit design (SMACD), pp 37–40

  • Hui D, Yisheng Z, Baishan Z (2005) Research on the electromagnetic radiation of A PCB planar inductor. In: Microwave conference (APMC), vol 1, pp 4–7

  • Karjalainen PH, Heino P (2007) Different wire layouts for CMOS inductors. In: Electronic components and technology conference (ECTC), pp 1846–1850

  • Li L, Lee DW, Hwang KP, Min Y, Hizume T, Tanaka M, Mao M, Schneider T, Bubber R, Wang SX (2009) Small-resistance and high-quality-factor magnetic integrated inductors on PCB. IEEE Trans Adv packag 32:780–787

    Article  Google Scholar 

  • Ludwig M, Duffy M, O’Donnell T, McCloskey P, Mathuna SCO (2003) PCB integrated inductors for low power DC/DC converter. IEEE Trans Power Electron 18:937–945

    Article  Google Scholar 

  • Mohan SS, Hershenson M del M, Boyd SP, Lee TH (1999) Simple accurate expressions for planar spiral inductances. IEEE J Solid State Circuits 34:1419–1424

    Article  Google Scholar 

  • Murphy OH, McCarthy KG, Murphy PJ (2006) Minimization of via count in multiple-metal inductors performance characterization and physical modelling. In: Radio frequency integrated circuits (RFIC) symposium

  • O’Donnell T, Wang N, Meere R, Rhen F, Roy S, O’Sullivan D, O’Mathuna C (2008) Microfabricated inductors for 20 MHz DC–DC converters. In: Applied power electronics conference and exposition, pp 689–693

  • Richelli A, Colalongo L, Quarantelli M, Carmina M, Kovács-Vajna ZM (2004) A fully integrated inductor-based 1.8–6 V step-up converter. IEEE J Solid State Circuits 39:242–245

    Article  Google Scholar 

  • Sonntag C, Lomonova EA, Duarte JL (2008) Implementation of the Neumann formula for calculating the mutual inductance between planar PCB inductors. In: Electrical machines international conference, pp 1–6

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Acknowledgments

The authors appreciate the support from National Chip Implementation Center and Ministry of Science and Technology of R.O.C. under the Grant Nos. 103-2120-M-009-007, 103-2221-E-009-146, 102-2221-E-009-098 and 102-2633-E-009-001. This work was also supported in part by the UST-UCSD International Center of Excellence in Advanced Bio-Engineering sponsored by the Taiwan National Science Council I-RiCE Program under the Grant No. NSC-103-2911-I-009-101. On the other hand, we cannot express enough thanks to Dr. Sam for correcting and checking the presentation of this paper.

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Correspondence to Paul C.-P. Chao.

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Chao, P.CP., Cheng, CK. & Kuan, CH. Optimizing an on-chip boost DC–DC converter with an on-chip or on-board inductor. Microsyst Technol 21, 2727–2735 (2015). https://doi.org/10.1007/s00542-015-2532-5

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  • DOI: https://doi.org/10.1007/s00542-015-2532-5

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