Abstract
This study is dedicated to develop an on-chip DC–DC boost converter with on-chip or on-board inductors to provide steady high voltage biases from 2.8 to 5 V to drive the gate drivers for advanced liquid crystal displays. Note that the off-chip inductor as compared to the on-chip one inevitably occupies substantial board area and leads to negative effects of electro-magnetic interference (EMI). This study also intends to find optimal design of the on-chip or on-board inductors for an on-chip DC–DC converter in order to provide required large instantaneous currents, while minimizing negative impacts from the off-chip inductance. Parametric studies are conducted to successfully find optimal designs, including optimal switching frequency and duty. The optimization process is further standardized for future commercialization. The optimized DC–DC converters are taped out via the TSMC 0.35 μm CMOS process technology to validate the proposed design. Experiments are carried out for validating the performance of tape-out chips. The results clearly show the effectiveness of the designs and consistency to expectations.
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Acknowledgments
The authors appreciate the support from National Chip Implementation Center and Ministry of Science and Technology of R.O.C. under the Grant Nos. 103-2120-M-009-007, 103-2221-E-009-146, 102-2221-E-009-098 and 102-2633-E-009-001. This work was also supported in part by the UST-UCSD International Center of Excellence in Advanced Bio-Engineering sponsored by the Taiwan National Science Council I-RiCE Program under the Grant No. NSC-103-2911-I-009-101. On the other hand, we cannot express enough thanks to Dr. Sam for correcting and checking the presentation of this paper.
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Chao, P.CP., Cheng, CK. & Kuan, CH. Optimizing an on-chip boost DC–DC converter with an on-chip or on-board inductor. Microsyst Technol 21, 2727–2735 (2015). https://doi.org/10.1007/s00542-015-2532-5
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DOI: https://doi.org/10.1007/s00542-015-2532-5