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QPACE: power-efficient parallel architecture based on IBM PowerXCell 8i

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Computer Science - Research and Development

Abstract

QPACE is a novel massively parallel architecture optimized for lattice QCD simulations. Each node comprises an IBM PowerXCell 8i processor. The nodes are interconnected by a custom 3-dimensional torus network implemented on an FPGA. The architecture was systematically optimized with respect to power consumption. This put QPACE in the number one spot on the Green500 List published in November 2009. In this paper we give an overview of the architecture and highlight the steps taken to improve power efficiency.

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References

  1. Baier H et al (2009) QPACE: a QCD parallel computer based on cell processors. arXiv:0911.2174 [hep-lat]

  2. http://www.green500.org (accessed on 01 July 2010)

  3. Boettiger H, Krill B, Rinke S (2010) QPACE: energy-efficient high performance computing. In: 23th international conference on architecture of computing systems 2010 (ARCS ’10) workshop proceedings

  4. Clark MA, Babich R, Barros K, Brower RC, Rebbi C (2009) Solving lattice QCD systems of equations using mixed precision solvers on GPUs. arXiv:0911.3191 [hep-lat]

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Authors and Affiliations

  1. IBM Deutschland Research & Development GmbH, 71032, Böblingen, Germany

    H. Baier, H. Boettiger, U. Fischer, G. Goldrian, T. Huth, B. Krill, J. Lauritsen, M. Ries, H. Schick & J.-S. Vogt

  2. Research Center Jülich, 52425, Jülich, Germany

    M. Drochner, N. Eicker & T. Lippert

  3. University of Wuppertal, 42119, Wuppertal, Germany

    N. Eicker, Z. Fodor, A. Frommer, M. Hüsken & T. Lippert

  4. IBM La Gaude, Le Plan du Bois, La Gaude, 06610, France

    C. Gomez

  5. Department of Physics, University of Regensburg, 93040, Regensburg, Germany

    S. Heybrock, D. Hierl, T. Maurer, B. Mendl, N. Meyer, A. Nobile, A. Schäfer, S. Solbrig, T. Streuer, T. Wettig & F. Winter

  6. IBM Rochester, 3605 HWY 52 N, Rochester, MN, 55901-1407, USA

    I. Ouda

  7. University of Ferrara, 44100, Ferrara, Italy

    M. Pivanti, F. Schifano & R. Tripiccione

  8. Deutsches Elektronen Synchrotron (DESY), 15738, Zeuthen, Germany

    D. Pleiter, H. Simma, K.-H. Sulanke & F. Winter

Authors
  1. H. Baier
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  2. H. Boettiger
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  3. M. Drochner
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  4. N. Eicker
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  5. U. Fischer
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  6. Z. Fodor
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  7. A. Frommer
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  8. C. Gomez
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  9. G. Goldrian
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  10. S. Heybrock
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  11. D. Hierl
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  12. M. Hüsken
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  13. T. Huth
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  14. B. Krill
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  15. J. Lauritsen
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  16. T. Lippert
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  17. T. Maurer
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  18. B. Mendl
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  19. N. Meyer
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  20. A. Nobile
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  21. I. Ouda
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  22. M. Pivanti
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  23. D. Pleiter
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  24. M. Ries
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  25. A. Schäfer
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  26. H. Schick
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  27. F. Schifano
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  28. H. Simma
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  29. S. Solbrig
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  30. T. Streuer
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  31. K.-H. Sulanke
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  32. R. Tripiccione
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  33. J.-S. Vogt
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  34. T. Wettig
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  35. F. Winter
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Corresponding author

Correspondence to D. Pleiter.

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Baier, H., Boettiger, H., Drochner, M. et al. QPACE: power-efficient parallel architecture based on IBM PowerXCell 8i. Comput Sci Res Dev 25, 149–154 (2010). https://doi.org/10.1007/s00450-010-0122-4

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  • DOI: https://doi.org/10.1007/s00450-010-0122-4

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