Skip to main content
Log in

On Verification of Parallel Message-Passing Processes

  • Original Paper
  • Published:
Formal Aspects of Computing

Abstract.

One way to reason about parallel processes is to assume that the execution of each process is subdivided into ‘small enough’ steps, and that these are executed in an interleaved fashion, thus obtaining a sequential program. The steps should be so small that for any parallel execution there will, in a suitable sense, exist a corresponding interleaved execution ending in the same state. The usual way to ensure this is to require that each step should contain at most one global access. However, if the global entities are communication channels, then larger steps may in some cases be allowed, and this may make reasoning about the programs easier. This paper explores these cases, and discusses consequences or verification and deadlock avoidance.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Institutional subscriptions

Similar content being viewed by others

Author information

Authors and Affiliations

Authors

Additional information

Received December 2000 / Accepted in revised form September 2001

Rights and permissions

Reprints and permissions

About this article

Cite this article

Krogdahl, S., Lysne, O. On Verification of Parallel Message-Passing Processes. Form Aspects Comput 13, 471–492 (2002). https://doi.org/10.1007/s001650200023

Download citation

  • Issue Date:

  • DOI: https://doi.org/10.1007/s001650200023

Navigation