Article

Journal of Signal Processing Systems

, Volume 71, Issue 3, pp 297-312

Local Interpolation-based Polar Format SAR: Algorithm, Hardware Implementation and Design Automation

  • Qiuling ZhuAffiliated withDepartment of Electrical and Computer Engineering, Carnegie Mellon University Email author 
  • , Christian R. BergerAffiliated withDepartment of Electrical and Computer Engineering, Carnegie Mellon University
  • , Eric L. TurnerAffiliated withDepartment of Electrical and Computer Engineering, Carnegie Mellon University
  • , Larry PileggiAffiliated withDepartment of Electrical and Computer Engineering, Carnegie Mellon University
  • , Franz FranchettiAffiliated withDepartment of Electrical and Computer Engineering, Carnegie Mellon University

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Abstract

In this paper we present a local interpolation-based variant of the well-known polar format algorithm used for synthetic aperture radar (SAR) image formation. We develop the algorithm to match the capabilities of the application-specific logic-in-memory processing paradigm, which off-loads lightweight computation directly into the SRAM and DRAM. Our proposed algorithm performs filtering, an image perspective transformation, and a local 2D interpolation, and supports partial and low-resolution reconstruction. We implement our customized SAR grid interpolation logic-in-memory hardware in advanced 14 nm silicon technology. Our high-level design tools allow to instantiate various optimized design choices to fit image processing and hardware needs of application designers. Our simulation results show that the logic-in-memory approach has the potential to enable substantial improvements in energy efficiency without sacrificing image quality.

Keywords

Synthetic aperture radar Logic in memory Chip generator