The Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology

, Volume 47, Issue 1, pp 33–45

Designing a Posture Analysis System with Hardware Implementation

  • J. G. F. Coutinho
  • M. P. T. Juvonen
  • J. L. Wang
  • B. L. Lo
  • W. Luk
  • O. Mencer
  • G. Z. Yang
Article

DOI: 10.1007/s11265-006-0016-7

Cite this article as:
Coutinho, J.G.F., Juvonen, M.P.T., Wang, J.L. et al. J VLSI Sign Process Syst Sign Image Video Technol (2007) 47: 33. doi:10.1007/s11265-006-0016-7
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Abstract

Posture analysis is an active research area in computer vision for applications such as home care and security monitoring. This paper describes the design of a system for posture analysis with hardware acceleration, addressing the following four aspects: (a) a design workflow for posture analysis based on radial shape and projection histogram representations; (b) the implementation of different architectures based on a high-level hardware design approach with support for automating transformations to improve parallelism and resource optimisation; (c) accuracy evaluation of the proposed posture analysis system, and (d) performance evaluation for the derived designs. One of the designs, which targets a Xilinx XC2V6000 FPGA at 90.2 MHz, is able to perform posture analysis at a rate of 1,164 frames per second with a frame size of 320 by 240 pixels. It represents 3.5 times speedup over optimised software running on a 2.4 GHz AMD Athlon 64 3700+ computer. The frame rate is well above that of real-time video, which enables the sharing of the FPGA among multiple video sources.

Keywords

posture analysisgait analysishardware compilationFPGAubiquitous sensor networks

Copyright information

© Springer Science+Business Media, LLC 2007

Authors and Affiliations

  • J. G. F. Coutinho
    • 1
  • M. P. T. Juvonen
    • 1
  • J. L. Wang
    • 1
  • B. L. Lo
    • 1
  • W. Luk
    • 1
  • O. Mencer
    • 1
  • G. Z. Yang
    • 1
  1. 1.Department of ComputingImperial College LondonLondonUK