Multicore realtime scheduling for generalized parallel task models
 Abusayeed Saifullah,
 Jing Li,
 Kunal Agrawal,
 Chenyang Lu,
 Christopher Gill
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Multicore processors offer a significant performance increase over singlecore processors. They have the potential to enable computationintensive realtime applications with stringent timing constraints that cannot be met on traditional singlecore processors. However, most results in traditional multiprocessor realtime scheduling are limited to sequential programming models and ignore intratask parallelism. In this paper, we address the problem of scheduling periodic parallel tasks with implicit deadlines on multicore processors. We first consider a synchronous task model where each task consists of segments, each segment having an arbitrary number of parallel threads that synchronize at the end of the segment. We propose a new task decomposition method that decomposes each parallel task into a set of sequential tasks. We prove that our task decomposition achieves a resource augmentation bound of 4 and 5 when the decomposed tasks are scheduled using global EDF and partitioned deadline monotonic scheduling, respectively. Finally, we extend our analysis to a directed acyclic graph (DAG) task model where each node in the DAG has a unit execution requirement. We show how these tasks can be converted into synchronous tasks such that the same decomposition can be applied and the same augmentation bounds hold. Simulations based on synthetic workload demonstrate that the derived resource augmentation bounds are safe and sufficient.
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 Title
 Multicore realtime scheduling for generalized parallel task models
 Journal

RealTime Systems
Volume 49, Issue 4 , pp 404435
 Cover Date
 20130701
 DOI
 10.1007/s1124101291669
 Print ISSN
 09226443
 Online ISSN
 15731383
 Publisher
 Springer US
 Additional Links
 Topics
 Keywords

 Parallel task
 Multicore processor
 Realtime scheduling
 Resource augmentation bound
 Industry Sectors
 Authors

 Abusayeed Saifullah ^{(1)}
 Jing Li ^{(1)}
 Kunal Agrawal ^{(1)}
 Chenyang Lu ^{(1)}
 Christopher Gill ^{(1)}
 Author Affiliations

 1. Department of Computer Science and Engineering, Washington University in St. Louis, Campus Box. 1045, St Louis, MO, 63130, USA