Journal of Electronic Testing

, Volume 28, Issue 5, pp 599-614

First online:

FPGA-based Novel Adaptive Scheme Using PN Sequences for Self-Calibration and Self-Testing of MEMS-based Inertial Sensors

  • Elie H. SarrafAffiliated withDepartment of Electrical and Computer Engineering, University of British Columbia Email author 
  • , Ankit KansalAffiliated withDepartment of Electrical Engineering, Indian Institute of Technology
  • , Mrigank SharmaAffiliated withDepartment of Electrical and Computer Engineering, University of British Columbia
  • , Edmond CretuAffiliated withDepartment of Electrical and Computer Engineering, University of British Columbia

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We propose a novel adaptive technique based on pseudo-random (PN) sequences for self-calibration and self-testing of MEMS-based inertial sensors (accelerometers and gyroscopes). The method relies on using a parameterized behavioral model implemented on FPGA, whose parameters values are adaptively tuned, based on the response to test pseudo-random actuation of the physical structure. Dedicated comb drives actuate the movable mass with binary maximum length pseudo-random sequences of small amplitude, to keep the device within the linear operating regime. The frequency of the stimulus is chosen within the mechanical spectral operating range of the micro-device, such that the induced response leads to the identification of the mechanical transfer function, and to the tuning of the associated digital behavioral model. In case of a micro-gyroscope, experimental results demonstrate the adaptive tracking of the damping coefficient from 5.57 × 10−5Kg/s to 7.12 × 10−5Kg/s and of the stiffness coefficient from 132 N/m to 137.7 N/m. In the case of a MEMS accelerometer, the damping and stiffness coefficients are correctly tracked from 3.4 × 10−3Kg/s and 49.56 N/m to 4.57 × 10−3Kg/s and 51.48 N/m, respectively—the former values are designer-specified target values, while the latter are experimentally measured parameters for fabricated devices operating in a real environment. Hardware resources estimation confirms the small area the proposed algorithm occupies on the targeted FPGA device.


PN sequences Impulse-response FPGA MEMS Accelerometer Gyroscope Self-testing Self-calibration