Cluster Computing

, Volume 17, Issue 2, pp 315–325

Architecture and applications for an All-FPGA parallel computer

Article

DOI: 10.1007/s10586-013-0278-3

Cite this article as:
Rajasekhar, Y. & Sass, R. Cluster Comput (2014) 17: 315. doi:10.1007/s10586-013-0278-3
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Abstract

The Reconfigurable Computing Cluster (RCC) project has been investigating unconventional architectures for high end computing using a cluster of FPGA devices connected by a high-speed, custom network. Most applications use the FPGAs to realize an embedded System-on-a-Chip (SoC) design augmented with application-specific accelerators to form a message-passing parallel computer. Other applications take a single accelerator core and tessellate the core across all of the devices, treating them like a large virtual FPGA. The experimental hardware has also been used for basic computer research by emulating novel architectures. This article discusses the genesis of the over-arching project, summarizes results of individual investigations that have been completed, and how this approach may prove useful in the investigation of future Exascale systems.

Keywords

FPGAs Cluster Architectures Exascale 

Copyright information

© Springer Science+Business Media New York 2013

Authors and Affiliations

  1. 1.Reconfigurable Computing Systems LaboratoryUniversity of North Carolina at CharlotteCharlotteUSA

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