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An ultra-low-voltage ultra-low-power CMOS active mixer

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Abstract

The scaling of CMOS technology has greatly influenced the design of analog and radio-frequency circuits. In particular, as technology advances, due to the use of lower supply voltage the available voltage headroom is decreased. In this paper, after a brief overview of conventional low-power CMOS active mixer structures, we introduce an active mixer structure with sub-mW-level power consumption that is capable of operating from a supply voltage comparable or lower than the threshold voltage of the transistor. In addition, the proposed architecture provides a performance and conversion gain (CG) that compares favorably or exceeds those of the state-of-the-art designs. As a proof-of-concept, a wide-band DC to 8.5 GHz down-conversion mixer is designed and fabricated in a 90-nm CMOS process. Measurement results show that the mixer achieves a CG as high as 18 dB while consuming 98 μW from a 0.3-V supply.

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Notes

  1. The list of these publications is available at http://www.ece.ubc.ca/~amirms/mixer-trend.xlsx

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Acknowledgments

This research is supported in part by the Natural Sciences and Engineering Research Council (NSERC) of Canada. CAD tools and access to technology are facilitated by CMC Microsystems. The authors would also like to thank Dr. Roberto Rosales and Hooman Rashtian for their technical assistance, and Roozbeh Mehrabadi for CAD tool support.

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Authors and Affiliations

  1. Department of Electrical and Computer Engineering, University of British Columbia, Vancouver, BC, Canada

    Amir Hossein Masnadi Shirazi & Shahriar Mirabbasi

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  1. Amir Hossein Masnadi Shirazi
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  2. Shahriar Mirabbasi
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Correspondence to Amir Hossein Masnadi Shirazi.

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Shirazi, A.H.M., Mirabbasi, S. An ultra-low-voltage ultra-low-power CMOS active mixer. Analog Integr Circ Sig Process 77, 513–528 (2013). https://doi.org/10.1007/s10470-013-0163-2

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  • DOI: https://doi.org/10.1007/s10470-013-0163-2

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