Analog Integrated Circuits and Signal Processing

, Volume 73, Issue 2, pp 649–659

Power consumption benchmarking for reconfigurable platforms

  • Teemu Pitkänen
  • Peter Jamieson
  • Tobias Becker
  • Sami Moisio
  • Jarmo Takala
Article

DOI: 10.1007/s10470-012-9950-4

Cite this article as:
Pitkänen, T., Jamieson, P., Becker, T. et al. Analog Integr Circ Sig Process (2012) 73: 649. doi:10.1007/s10470-012-9950-4
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Abstract

Software defined radios (SDR) wideband mobile terminals must be capable of data processing while consuming low power and keeping the design and manufacturing costs as low as possible. SDR can combine high performance signal processing and flexibility, but power efficiency of SDR nodes is an issue that needs to be addressed. Analysis of power consumption for various target technologies is challenging, since each technology typically contains its own benchmarking tools and thus, results are not comparable. In this paper, we illustrate how the GroundHog2009 benchmark suite, designed to be platform independent, can be used to evaluate power dissipation of four modern FPGAs and one microcontroller. We also introduce a generic RTL library for the GroundHog2009 design cases and test bench infra-structure to make the toolset usage easy. In addition, we show that power can be saved by using clock management, available on one of the FGPA-boards. The power savings range from 38 to 1,150 %.

Keywords

Power consumption GroundHog2009 FPGA Benchmark 

Copyright information

© Springer Science+Business Media, LLC 2012

Authors and Affiliations

  • Teemu Pitkänen
    • 1
  • Peter Jamieson
    • 2
  • Tobias Becker
    • 3
  • Sami Moisio
    • 4
  • Jarmo Takala
    • 1
  1. 1.Tampere University of TechnologyTampereFinland
  2. 2.Miami UniversityOxfordUSA
  3. 3.Imperial College LondonLondonUK
  4. 4.Nokia Devices R&DTampereFinland

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