Analog Integrated Circuits and Signal Processing

, Volume 73, Issue 2, pp 649-659

First online:

Power consumption benchmarking for reconfigurable platforms

  • Teemu PitkänenAffiliated withTampere University of Technology Email author 
  • , Peter JamiesonAffiliated withMiami University
  • , Tobias BeckerAffiliated withImperial College London
  • , Sami MoisioAffiliated withNokia Devices R&D
  • , Jarmo TakalaAffiliated withTampere University of Technology

Rent the article at a discount

Rent now

* Final gross prices may vary according to local VAT.

Get Access


Software defined radios (SDR) wideband mobile terminals must be capable of data processing while consuming low power and keeping the design and manufacturing costs as low as possible. SDR can combine high performance signal processing and flexibility, but power efficiency of SDR nodes is an issue that needs to be addressed. Analysis of power consumption for various target technologies is challenging, since each technology typically contains its own benchmarking tools and thus, results are not comparable. In this paper, we illustrate how the GroundHog2009 benchmark suite, designed to be platform independent, can be used to evaluate power dissipation of four modern FPGAs and one microcontroller. We also introduce a generic RTL library for the GroundHog2009 design cases and test bench infra-structure to make the toolset usage easy. In addition, we show that power can be saved by using clock management, available on one of the FGPA-boards. The power savings range from 38 to 1,150 %.


Power consumption GroundHog2009 FPGA Benchmark