CMOS-based near zero-offset multiple inputs max–min circuits and its applications
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CMOS-based near zero-offset multiple inputs maximum circuit and minimum circuits are proposed. The analog signal building blocks including shunt-feedback buffer, voltage-subtraction circuits and current mirrors are deployed for obtained the good performances. This achieved circuit is a simply scheme and able to work with low-power supplies. The input range is obtained around ±600 mV within ±1.5 V power supplies. Near zero-offset and low-output impedance are provided by proposed circuit. The delay of output is less than 5 ns for THD less than 1% and frequency response up to 500 MHz. Half-wave, full-wave rectifiers and 4 bits linear combination Digital-to-Analog Converter (DAC) are raised up to confirm the realistic applications. All performances including the DC-characteristic, frequency response, high-frequency wave output are simulated by PSpice.
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- CMOS-based near zero-offset multiple inputs max–min circuits and its applications
Analog Integrated Circuits and Signal Processing
Volume 61, Issue 1 , pp 93-105
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- Maximum circuit
- Minimum circuit
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- Author Affiliations
- 1. Department of Telecommunications Engineering, Faculty of Engineering, King’s Mongkut Institute of Technology Ladkrabang, Bangkok, 10520, Thailand
- 2. Electrical Engineering Department, Faculty of Engineering, Siam University, Bangkok, 10160, Thailand