Microsystem Technologies

, Volume 16, Issue 7, pp 1051–1055

3D System-on-Chip technologies for More than Moore systems

Authors

  • Peter Ramm
    • Munich DivisionFraunhofer Institute for Reliability and Microintegration
  • Armin Klumpp
    • Munich DivisionFraunhofer Institute for Reliability and Microintegration
    • Munich DivisionFraunhofer Institute for Reliability and Microintegration
  • Maaike M. V. Taklo
    • Department for Microsystems and NanotechnologySINTEF
Technical Paper

DOI: 10.1007/s00542-009-0976-1

Cite this article as:
Ramm, P., Klumpp, A., Weber, J. et al. Microsyst Technol (2010) 16: 1051. doi:10.1007/s00542-009-0976-1

Abstract

3D integration is a key solution to the predicted performance problems of future ICs as well as it offers extreme miniaturization and cost-effective fabrication of More than Moore products. Through silicon via (TSV) technologies enable high interconnect performance compared to 3D packaging. At present TSVs are associated with a relatively high fabrication cost, but research world wide strive to bring the cost down to an acceptable level. An example of a 3D System-on-Chip (3D-SOC) technology is to introduce a post backend-of-line TSV process as an optimized technology for heterogeneous system integration. The introduced ICV-SLID process, that combines both TSVs and bonding, enables 3D integration of fabricated devices. Reliability issues related to thermo-mechanical stress caused by the TSV formation and the bonding are considered. 3D-SOC technology choices made to realize a heterogeneous ultra-small IC stack for a wireless tire pressure monitoring system (TPMS) as an automotive application are described.

Copyright information

© Springer-Verlag 2009