, Volume 25, Issue 3-4, pp 149-154
Date: 30 Jul 2010

QPACE: power-efficient parallel architecture based on IBM PowerXCell 8i

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Abstract

QPACE is a novel massively parallel architecture optimized for lattice QCD simulations. Each node comprises an IBM PowerXCell 8i processor. The nodes are interconnected by a custom 3-dimensional torus network implemented on an FPGA. The architecture was systematically optimized with respect to power consumption. This put QPACE in the number one spot on the Green500 List published in November 2009. In this paper we give an overview of the architecture and highlight the steps taken to improve power efficiency.