Circuits, Systems and Signal Processing

, Volume 24, Issue 4, pp 401–413

Design and Implementation of 160×192 Pixel Array Capacitive-Type Fingerprint Sensor

Article

DOI: 10.1007/s00034-004-0818-4

Cite this article as:
Nam, JM., Jung, SM., Yang, DH. et al. Circuits Syst Signal Process (2005) 24: 401. doi:10.1007/s00034-004-0818-4

Abstract

The application specific integrated circuit implementation of a capacitive fingerprint sensor system-on-chip (SOC), which embeds a 32-bit microcontroller for performing an identification algorithm, is described for user authentication on small, thin, and portable equipment. The SOC is composed of 160 × 192 array cells with a sensor detection circuit and an embedded 32-bit reduced instruction set computer (RISC) microcontroller. The proposed sensor detection circuit increases the voltage difference between a ridge and valley about 80% more than conventional circuits and minimizes an electrostatic discharge influence by applying an effective isolation structure. The 32-bit RISC microcontroller is embedded by a latch base for low power and low complexity. The test chip was fabricated on a 0.35 μm standard complementary metal oxide semiconductor 1-poly 4-metal process.

Copyright information

© Birkhauser Boston 2005

Authors and Affiliations

  1. 1.VLSI and CAD Laboratory, Department of Electrical and Electronic Engineering, Yonsei University, SeoulKorea