Packing directed circuits fractionally
- P. D. Seymour
- … show all 1 hide
Rent the article at a discountRent now
* Final gross prices may vary according to local VAT.Get Access
LetG be a digraph, and letk≥1, such that no “fractional” packing of directed circuits ofG has value >k, when every vertex is given “capacity” 1. We prove there is a set ofO (k logk logk) vertices meeting all directed circuits ofG.
- N. Alon, andJ. H. Spencer:The Probabilistic Method, Wiley, 1991.
- A. Lubotzky, R. Phillips, andP. Sarnak: Ramanujan graphs,Combinatorica 8 (1988), 261–277.
- G. A. Margulis: Explicit group-theoretical constructions of combinatorial schemes and their application to the design of expanders and superconcentrators,Problemy Pederachi Informatsii 24 (1988), 51–60 (in Russian). English translation inProblems of Information Transmission 24 (1988), 39–46.
- W. McCuaig: Intercyclic digraphs,Graph Structure Theory (Neil Robertson and Paul Seymour, eds.), AMS Contemporary Math., (147) 1991, 203–245.
- D. H. Younger: Graphs with interlinked directed circuits,Proceedings of the Midwest Symposium on Circuit Theory 2 (1973), XVI 2.1-XVI 2.7.
- Packing directed circuits fractionally
Volume 15, Issue 2 , pp 281-288
- Cover Date
- Print ISSN
- Online ISSN
- Additional Links
- 05 C 20
- 05 C 38
- 05 C 70
- Industry Sectors
- P. D. Seymour (1)
- Author Affiliations
- 1. Bellcore, 445 South St., 07960, Morristown, New Jersey, USA