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3D System-on-Chip technologies for More than Moore systems

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Abstract

3D integration is a key solution to the predicted performance problems of future ICs as well as it offers extreme miniaturization and cost-effective fabrication of More than Moore products. Through silicon via (TSV) technologies enable high interconnect performance compared to 3D packaging. At present TSVs are associated with a relatively high fabrication cost, but research world wide strive to bring the cost down to an acceptable level. An example of a 3D System-on-Chip (3D-SOC) technology is to introduce a post backend-of-line TSV process as an optimized technology for heterogeneous system integration. The introduced ICV-SLID process, that combines both TSVs and bonding, enables 3D integration of fabricated devices. Reliability issues related to thermo-mechanical stress caused by the TSV formation and the bonding are considered. 3D-SOC technology choices made to realize a heterogeneous ultra-small IC stack for a wireless tire pressure monitoring system (TPMS) as an automotive application are described.

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Acknowledgment

This report is partly based on a project supported by the European Commission under support-no. IST-026461. The authors would like to thank the colleagues of the e-CUBES project, especially Thomas Herndl, Josef Prainsack and Werner Weber/Infineon, Nicolas Lietaer/SINTEF/Gjermund Kittilsland/Sensonor, Peter Schneider and Sven Reitz/Fraunhofer IIS, Eberhard Kaulfersch, Robert Wieland, Reinhard Merkel, Lars Nebrich and Matthias Klein/Fraunhofer IZM.

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Correspondence to Josef Weber.

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Ramm, P., Klumpp, A., Weber, J. et al. 3D System-on-Chip technologies for More than Moore systems. Microsyst Technol 16, 1051–1055 (2010). https://doi.org/10.1007/s00542-009-0976-1

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  • DOI: https://doi.org/10.1007/s00542-009-0976-1

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